Patent · US10651846B2 · B2 · US
Driver circuit and switching regulator
- (11) Publication number
- US10651846B2
- (21) Application number
- 16/261,810
- (22) Filing date
- 2019-01-30
- (30) Priority date
- 2018-02-01
- (43) Publication date
- 2020-05-12
- (45) Date of grant
- 2020-05-12
- (51) IPC
- H02M 1/08; H02M 3/158; H02M 7/537; H03K 17/687
- (52) CPC
- H03K Pulse technique: 17/6872, 17/163, 2217/0063
- H02M Apparatus for conversion between AC and AC, between AC and DC, or between DC and DC, and for use with mains or similar power supply systems; conversion of DC or AC input power into surge output power; control or regulation thereof: 1/08, 3/158, 7/537
- (73) Assignee
- Rohm Co Ltd
- (72) Inventors
- Shun FUKUSHIMA; Kazuhiro Murakami
- (54) Title
- Driver circuit and switching regulator
- (57) Abstract
A driver circuit (DRV 1) includes a pull-up circuit (PU 1) and a pull-down circuit (PD 1) that share an output node (external terminal (T 3)). A signal (DI 1 (DI 2)) input to the pull-up circuit (PU 1) and a signal (DI 3) input to the pull-down circuit (PD 1) are selected in a complementary manner, and the output node outputs an output signal in which rising time and falling time of the signals (DI 1 (DI 2) and DI 3) are adjusted in accordance with on-off operation of the signals. The rising time is adjusted by transistors (M 1 and M 2) and a resistor (R 1), while the falling time is adjusted by transistors (M 3, M 4 and M 5) and a resistor (R 2).
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Claims (18)
- A driver circuit comprising a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response, wherein time necessary for the second response is set to be longer than time necessary for the first response.
- The driver circuit according to claim 1, wherein the pull-up circuit or the pull-down circuit includes MOS type first transistor and second transistor having main conductive paths connected in parallel, and the first response is made by the first transistor, while the second response is made by the second transistor.
- The driver circuit according to claim 2, wherein a resistance component of the main conductive path of the second transistor is larger than a resistance component of the main conductive path of the first transistor.
- The driver circuit according to claim 3, wherein a ratio W/L between a channel width W and a channel length L of the second transistor is set to be smaller than that of the first transistor.
- The driver circuit according to claim 2, wherein current flowing in the main conductive path of the second transistor is smaller than current flowing in the main conductive path of the first transistor.
- The driver circuit according to claim 2, wherein a level at which the first response and the second response are switched is a threshold value voltage between gate and source of the first transistor.
- The driver circuit according to claim 2, further comprising a diode-connected transistor or a diode, wherein the diode-connected transistor or the diode is connected in series to the first transistor so as to form the main conductive path of the first transistor, and a level at which the first response and the second response are switched is a threshold value voltage between gate and source of the diode-connected transistor or a threshold value voltage of the diode.
- The driver circuit according to claim 7, wherein the diode-connected transistor, the first transistor, and the second transistor have the same conductivity type.
- The driver circuit according to claim 2, wherein the first transistor and the second transistor have opposite conductivity types.
- The driver circuit according to claim 2, further comprising a third transistor, wherein the main conductive path of the third transistor is connected in parallel to the main conductive paths of the first transistor and the second transistor, and the third transistor makes a third response after the first response and the second response.
- The driver circuit according to claim 1, wherein the pull-up circuit or the pull-down circuit includes bipolar type first transistor and second transistor having main conductive paths connected in parallel, and the first response is made by the first transistor, while the second response is made by the second transistor.
- The driver circuit according to claim 11, wherein a level at which the first response and the second response are switched is a forward voltage between base and emitter.
- The driver circuit according to claim 1, wherein a dead time is set in which both the pull-up circuit and the pull-down circuit are turned off when operations of the two circuits are switched.
- A switching regulator comprising: a switching transistor; an inductor to which current is supplied when the switching transistor is on-off controlled; a capacitor arranged to smooth electromagnetic energy stored in the inductor; and a driver circuit according to claim 1, arranged to perform the on-off control of the switching transistor.
- The switching regulator according to claim 14, wherein the switching regulator is one of a step-down type, a step-up type, a step-up-and-down type, and an inverting type.
- The switching regulator according to claim 15, wherein the switching regulator is a DC/DC converter or a DC/AC inverter.
- A driver circuit comprising a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response, wherein a dead time is set in which both the pull-up circuit and the pull-down circuit are turned off when operations of the two circuits are switched.
- A switching regulator comprising: a switching transistor; an inductor to which current is supplied when the switching transistor is on-off controlled; a capacitor arranged to smooth electromagnetic energy stored in the inductor; and a driver circuit arranged to perform the on-off control of the switching transistor, wherein the driver circuit comprises a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response.
Description
The present invention relates to a driver circuit and a switching regulator.
A driver circuit is used as a gate driver that drives an output stage of a switching regulator such as a DC-DC converter or a DC-AC inverter.
JP-A-2017-121068 (hereinafter referred to as Patent Document 1) discloses a gate driver that does not need a gate resistor and can reduce power consumption. The gate driver of Patent Document 1 includes a drive controller and a gate driver. When the drive controller receives a control signal for switching the power transistor to a conduction state, it switches a drive signal from a first level to a second level, and after a first period elapses it switches the drive signal to the first level, and further it switches the same to the second level after a second period elapses. When receiving a control signal for switching the power transistor to a cut-off state, the drive controller switches the drive signal from the second level to the first level, and after a third period elapses it switches the drive signal to second level, and further it switches the same to the first level after a fourth period elapses. The gate driver amplifies the drive signal and outputs the same.
JP-A-2016-73069 (hereinafter referred to as Patent Document 2) discloses a power supply device and its control method in which power saving is realized and ringing noise of a switching element can be reduced.
Citations (10)
- US5218239A
- JPH06296129A
- US20070035180A1
- US20080061876A1
- US20150002408A1
- JP2016073069A
- US20160301309A1
- US20170070147A1
- JP2017121068A
- US10027325B1
Record as JSON
{
"publication_number": "US10651846B2",
"country": "US",
"kind": "B2",
"title": "Driver circuit and switching regulator",
"abstract": "A driver circuit (DRV 1) includes a pull-up circuit (PU 1) and a pull-down circuit (PD 1) that share an output node (external terminal (T 3)). A signal (DI 1 (DI 2)) input to the pull-up circuit (PU 1) and a signal (DI 3) input to the pull-down circuit (PD 1) are selected in a complementary manner, and the output node outputs an output signal in which rising time and falling time of the signals (DI 1 (DI 2) and DI 3) are adjusted in accordance with on-off operation of the signals. The rising time is adjusted by transistors (M 1 and M 2) and a resistor (R 1), while the falling time is adjusted by transistors (M 3, M 4 and M 5) and a resistor (R 2).",
"claims": [
"1. A driver circuit comprising a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response, wherein time necessary for the second response is set to be longer than time necessary for the first response.",
"2. The driver circuit according to claim 1, wherein the pull-up circuit or the pull-down circuit includes MOS type first transistor and second transistor having main conductive paths connected in parallel, and the first response is made by the first transistor, while the second response is made by the second transistor.",
"3. The driver circuit according to claim 2, wherein a resistance component of the main conductive path of the second transistor is larger than a resistance component of the main conductive path of the first transistor.",
"4. The driver circuit according to claim 3, wherein a ratio W/L between a channel width W and a channel length L of the second transistor is set to be smaller than that of the first transistor.",
"5. The driver circuit according to claim 2, wherein current flowing in the main conductive path of the second transistor is smaller than current flowing in the main conductive path of the first transistor.",
"6. The driver circuit according to claim 2, wherein a level at which the first response and the second response are switched is a threshold value voltage between gate and source of the first transistor.",
"7. The driver circuit according to claim 2, further comprising a diode-connected transistor or a diode, wherein the diode-connected transistor or the diode is connected in series to the first transistor so as to form the main conductive path of the first transistor, and a level at which the first response and the second response are switched is a threshold value voltage between gate and source of the diode-connected transistor or a threshold value voltage of the diode.",
"8. The driver circuit according to claim 7, wherein the diode-connected transistor, the first transistor, and the second transistor have the same conductivity type.",
"9. The driver circuit according to claim 2, wherein the first transistor and the second transistor have opposite conductivity types.",
"10. The driver circuit according to claim 2, further comprising a third transistor, wherein the main conductive path of the third transistor is connected in parallel to the main conductive paths of the first transistor and the second transistor, and the third transistor makes a third response after the first response and the second response.",
"11. The driver circuit according to claim 1, wherein the pull-up circuit or the pull-down circuit includes bipolar type first transistor and second transistor having main conductive paths connected in parallel, and the first response is made by the first transistor, while the second response is made by the second transistor.",
"12. The driver circuit according to claim 11, wherein a level at which the first response and the second response are switched is a forward voltage between base and emitter.",
"13. The driver circuit according to claim 1, wherein a dead time is set in which both the pull-up circuit and the pull-down circuit are turned off when operations of the two circuits are switched.",
"14. A switching regulator comprising: a switching transistor; an inductor to which current is supplied when the switching transistor is on-off controlled; a capacitor arranged to smooth electromagnetic energy stored in the inductor; and a driver circuit according to claim 1, arranged to perform the on-off control of the switching transistor.",
"15. The switching regulator according to claim 14, wherein the switching regulator is one of a step-down type, a step-up type, a step-up-and-down type, and an inverting type.",
"16. The switching regulator according to claim 15, wherein the switching regulator is a DC/DC converter or a DC/AC inverter.",
"17. A driver circuit comprising a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response, wherein a dead time is set in which both the pull-up circuit and the pull-down circuit are turned off when operations of the two circuits are switched.",
"18. A switching regulator comprising: a switching transistor; an inductor to which current is supplied when the switching transistor is on-off controlled; a capacitor arranged to smooth electromagnetic energy stored in the inductor; and a driver circuit arranged to perform the on-off control of the switching transistor, wherein the driver circuit comprises a pull-up circuit and a pull-down circuit, arranged to share an output node so as to output an output signal from the output node by on-off operation of complementary input signals, wherein the pull-up circuit and the pull-down circuit are connected in series between a power supply terminal and a reference potential via the output node, and at least one of the pull-up circuit and the pull-down circuit responses to each of rising and falling of the input signals with a first response and a second response."
],
"description_excerpt": "The present invention relates to a driver circuit and a switching regulator.\n\nA driver circuit is used as a gate driver that drives an output stage of a switching regulator such as a DC-DC converter or a DC-AC inverter.\n\nJP-A-2017-121068 (hereinafter referred to as Patent Document 1) discloses a gate driver that does not need a gate resistor and can reduce power consumption. The gate driver of Patent Document 1 includes a drive controller and a gate driver. When the drive controller receives a control signal for switching the power transistor to a conduction state, it switches a drive signal from a first level to a second level, and after a first period elapses it switches the drive signal to the first level, and further it switches the same to the second level after a second period elapses. When receiving a control signal for switching the power transistor to a cut-off state, the drive controller switches the drive signal from the second level to the first level, and after a third period elapses it switches the drive signal to second level, and further it switches the same to the first level after a fourth period elapses. The gate driver amplifies the drive signal and outputs the same.\n\nJP-A-2016-73069 (hereinafter referred to as Patent Document 2) discloses a power supply device and its control method in which power saving is realized and ringing noise of a switching element can be reduced.",
"cpc": [
"H03K 17/6872",
"H02M 1/08",
"H02M 3/158",
"H02M 7/537",
"H03K 17/163",
"H03K 2217/0063"
],
"ipc": [
"H02M 1/08",
"H02M 3/158",
"H02M 7/537",
"H03K 17/687"
],
"assignees": [
"Rohm Co Ltd"
],
"inventors": [
"Shun FUKUSHIMA",
"Kazuhiro Murakami"
],
"filing_date": "2019-01-30",
"publication_date": "2020-05-12",
"grant_date": "2020-05-12",
"priority_date": "2018-02-01",
"application_number": "US-201916261810-A",
"family_id": "67392444",
"cited_by_count": 9,
"citations": [
"US5218239A",
"JPH06296129A",
"US20070035180A1",
"US20080061876A1",
"US20150002408A1",
"JP2016073069A",
"US20160301309A1",
"US20170070147A1",
"JP2017121068A",
"US10027325B1"
]
}
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