Non-rectifying clamps

{
  "publication_number": "US3772604A",
  "country": "US",
  "kind": "A",
  "title": "Non-rectifying clamps",
  "abstract": "To clamp a train of electric pulses in a system having a small signal-to-noise ratio, the point in the circuit to be clamped is arranged such that the d.c. level appears at the output thereof, is filtered therefrom and fed back to the input of the clamped stage, where it is subtracted out. The feedback path is broken if the output exceeds a predetermined value. Thus, the feedback path is interrupted during signal pulses. However, in the absence of pulse signals, the feedback arrangement maintains the base line close to ground.",
  "claims": [
    "1. A method of clamping a train of electric pulses having a first d.c. level and waves superimposed thereon for positioning the base line thereof at a desirable second d.c. level, said method comprising the steps of: a. applying the first d.c. level of the pulse train to a clamping stage having input and output sides, b. d.c. coupling the clamping stage such that the d.c. level of the pulses appearing at the output of the clamping stage is a function of the d.c. levels at its input, c. filtering the d.c. level from said output and feeding a d.c. level proportional thereto back to the input of the clamping stage, d. combining the fed-back d.c. level with the first d.c. level and signal, e. interrupting the feedback path if said output differs from said desirable d.c. level by a predetermined value, and f. restoring the feedback path if the magnitude of the difference between said output and said desirable level falls below said predetermined value.",
    "2. The method as set forth in claim 1, and comprising the step of amplifying the train of electric pulses having the first d.c. level and waves superimposed thereon.",
    "3. Apparatus for clamping electric pulses having input and output terminals for receiving an input signal comprising a train of pulses superimposed upon a first d.c. level and producing a composite signal comprising a train of pulses proportional to those of the input signal and superimposed upon a second d.c. level, said apparatus including: a. means for establishing a desird d.c. level, b. means for comparing said output signal with said desired d.c. level, c. means for combining said input signal with a fEedback signal, d. filter means for feeding back a result of comparison of said desired level and said output signal including said second d.c. level to a terminal of said combining means, e. means for modifying the feedback means at least during those periods in time in which the difference between said output signal and said desired level exceeds a predetermined amount, to form said feedback signal, and f. means for holding said feedback signal substantially constant during the time that the feedback path is modified, whereby said second level and said desired level approach equality regardless of number and size of said train of pulses in said input signal.",
    "4. Apparatus as claimed in claim 3, and further including a d.c. coupled amplifier.",
    "5. Apparatus as set forth in claim 4, wherein the amplifier includes a first input lead, a second input lead, and an output lead, and the feedback means include a feedback path coupling the output lead of the amplifier with the second input lead, said modifying means comprising gate means, and threshold circuit means, the inputs of the last two means being coupled to the amplifier output, and the output of the threshold circuit means being coupled to the gate means for controlling the gate means.",
    "6. Apparatus as set forth in claim 4, wherein the filter means includes a low pass filter comprising a first capacitor and a first resistor, the first terminals of the first capacitor and first resistor being connected to the second input lead of the amplifier, the second terminal of the first capacitor being grounded, and the second terminal of the first resistor being connected to the output lead of the gate means.",
    "7. Apparatus as set forth in claim 6, and further comprising: a. a stabilizing feedback resistor network including a second resistor in the first input lead of the amplifier and a third resistor in a path bridging the first input with the output of the amplifier, b. an integrator having an input lead connected to the gate means, and an output lead connected to the second input lead of the amplifier, c. the threshold circuit means including a comparator having a first input lead, a second input lead and an output lead, the output lead being connected to the gate means, d. absolute value circuit means having a first input lead connected to the output of the amplifier, a second input lead connected to ground, and an output lead connected to the first input lead of the comparator, and e. first voltage supply means comprising an electric source and voltage divider arranged parallel thereto, and grounded, the slider thereof being connected to the second input of the comparator.",
    "8. Apparatus as set forth in claim 7, wherein the gate means is shunted by a resistor.",
    "9. Apparatus as set forth in claim 7 including second voltage suuply means connected to the integrator and the first voltage supply means.",
    "10. Apparatus as set forth in claim 7 wherein the amplifier is a first amplifier, and the integrator comprises: a. a second amplifier having a first input lead coupled to the gate means, a second input lead connected to ground, an output lead coupled to the second input lead of the first amplifier, b. a second capacitor in a path connecting the output of the second amplifier with the first input thereof, c. a resistor in a path connecting the first input of the second amplifier with the gate means, and d. an attenuator comprising a pair of resistors in series connection, the seventh resistor being grounded, the node between the last two resistors being connected to the second input of the first amplifier.",
    "11. Apparatus as set forth in claim 10, wherein the absolute value circuit means comprise A. a third amplifier having a. a first input lead coupled to the output lead of the first amplifier, b. a second input lead being grounded, c. an output lead, d. a resistor in the first input lead, and e. a resistor in a path connecTing the first input lead and the output lead, the absolute value circuit means further comprising B. a fourth amplifier, including a. a first input lead coupled to the output lead of the third amplifier, b. a second input lead connected to the second input lead of the third amplifier, c. an output lead coupled to the comparator, d. a resistor in the first input lead, and e. a resistor in a path bridging the first input lead and the output lead, C. a first diode in the output path of the third amplifier, D. a second diode in the output path of the fourth amplifier, the cathodes of the two diodes being commonly coupled to the comparator, E. an anti-lockout circuit interposed between the two diodes and the comparator.",
    "12. Apparatus as set forth in claim 11, wherein the anti-lockout circuit comprises a. a third capacitor in the first input lead of the comparator, and b. a third diode and a resistor being arranged in parallel to the first input lead of the comparator.",
    "13. Apparatus as set forth in claim 10, and further comprising: a. a first trailing edge detector having the input thereof connected to the output of the comparator, and b. a one-shot-multivibrator, the input thereof connected to output of the trailing edge detector, the output of the one-shot-multivibrator connected to the gate means.",
    "14. Apparatus as set forth in claim 13, and further comprising: a. a flip-flop switch operatively connected to the gate means, the flip-flop switch having a first input line, a second input line and an output line, the first input line of the flip-flop switch being directly connected to the output of the comparator for setting the flip-flop switch, the second input line of the flip-flop switch being electrically parallel to the first input line and coupled to the output of the comparator for resetting the flip-flop switch, the output lead of the flip-flop switch being directly connected to an input of the gate element, and b. a second trailing edge detector, the input thereof connected to the output of the one-shot-multivibrator, the output of the second trailing edge detector being connected to the second input of the flip-flop switch.",
    "15. Apparatus as set forth in claim 14, and further comprising: a. a delay member one terminal thereof coupled to the output of the first amplifier and the other terminal connected to the gate means, b. another resistor interposed between the delay member and the output of the first amplifier, and c. a further resistor, one terminal thereof connected to the path connecting the delay member with the gate means, the other terminal thereof being grounded.",
    "16. Apparatus as set forth in claim 4, comprising: a. a first pentode, the first grid thereof connected to the signal input lead, b. a pair of resistors coupled to the cathode of the first pentode for providing negative feedback signal gain stability, c. a second pentode, d. means for coupling the second pentode to the first pentode including means for coupling the cathode of the second pentode to the plate of the first pentode, e. a first triode being a cathode follower coupled to the first pentode, f. a voltage divider d.c. coupling the first triode to the first pentode, g. a pair of resistors arranged in series as cathode resistor of the cathode follower and being connected on one side to a potential of -150 volts and on the other to a potential of -300 volts h. a resistor in the order of 10K ohms interposed as a parasite suppressor between the first grid of the second pentode and the cathode of the cathode follower, i. a second triode having a resistor in series with the cathode thereof, being arranged as dynamic load resistor for the second pentode, j. an output lead of the second pentode having a branching off terminal being coupled to the gate means, and k. a Miller integrator coupled to the gate means.",
    "17. Apparatus as set forth in claim 16, wherein the gate means comprise: a. a fourth diode and a fifth diode arranged such that the cathodes thereof are connected in common to a voltage supply in the order of +150 volts, the plate of the fourth diode being coupled to said output voltage lead of the second pentode, the plate of the second diode being grounded, b. a sixth diode and a seventh diode arranged such that the plates thereof are connected in common to a voltage supply in the order of +150 volts, the cathode of the sixth diode being coupled to said output voltage lead of the second pentode, the cathode of the seventh diode being grounded, c. a first dual triode including a third triode and a fourth triode, the plate of the third triode being connected to the juncture of the cathodes of the fourth and fifth diodes, the plate of the fourth triode being connected to the juncture of plates of the sixth and seventh diodes, the cathodes of the third and fourth triodes being commonly coupled over a resistor to a voltage supply in the order of -300 volts, the grid of the third triode being coupled to ground over a resistor and also coupled through another resistor to a -300 volt potential, the grid of the fourth triode being coupled to a threshold circuit which is set just above noise level negative pulses, and d. a capacitor, one terminal thereof of being grounded, the other terminal thereof being connected to said output voltage lead of the second pentode at a point intermediate the juncture connections to the plate of the fifth diode and the cathode of the seventh diode.",
    "18. Apparatus as set forth in claim 16, wherein the Miller integrator comprises: a. a fifth triode and a sixth triode, the cathodes of the fifth and sixth triodes being commonly coupled over a resistor in the order of 270K ohms to a voltage supply of about -150 volts, the grid of the fifth triode being coupled over a resistor in the order of 3.3 Megohm to said output voltage lead of the second pentode, the grid of the sixth triode being coupled over a resistor to ground, the plate of the fifth triode being shunted to the grid thereof by a capacitor in the order of 1.0 microfarad, the plates of the fifth and sixth triodes being coupled over resistors in the order of 470K ohms each to a path joining the plates of the first and second triodes as well as the plate of the first pentode, and b. means for coupling the plate of the fifth triode to the first pentode.",
    "19. Apparatus as set forth in claim 18, wherein the means for coupling the plate of the fifth triode to the first pentode includes a seventh triode, the cathode thereof being connected to the second grid of the first pentode, the grid of the seventh triode being connected to the plate of the fifth triode, and the plate of the seventh triode being connected to a 300 volt potential, and coupled to the plate of the first pentode, there also being provided a voltage regulator tube coupled to the cathode of the first pentode and the plate thereof.",
    "20. Apparatus as set forth in claim 16, wherein the means for coupling the cathode of the second pentode to the plate of the first pentode includes a resistor in the order of 50K ohms and a resistor in the order of 680K ohms, the last two resistors being connected in series the node therebetween being connected to the cathode of the first triode."
  ],
  "cpc": [
    "G06G 7/25",
    "H03K 5/086"
  ],
  "ipc": [
    "G01N 15/12",
    "G01N 27/00",
    "G06G 7/25",
    "H03K 5/08"
  ],
  "assignees": [
    "Coulter Electronics Inc"
  ],
  "inventors": [
    "W Hogg",
    "W Coulter"
  ],
  "filing_date": "1972-05-12",
  "publication_date": "1973-11-13",
  "grant_date": "1973-11-13",
  "priority_date": "1972-05-12",
  "application_number": "US-3772604D-A",
  "family_id": "22957577",
  "cited_by_count": 31,
  "citations": [
    "US3435252A",
    "US3579123A"
  ]
}