Multi level comparator for demodulator

{
  "publication_number": "US6173018B1",
  "country": "US",
  "kind": "B1",
  "title": "Multi level comparator for demodulator",
  "abstract": "In a demodulator circuit including a multi-level comparator, the demodulator circuit obtaining output data through comparison, made in a four-level comparator and a NRZ comparator, of a signal obtained by subjecting a received signal to a process of detection and predetermined threshold levels, comprises a level detector circuit for detecting the level of the received signal transmitted through the process of detection and a control circuit for controlling relative magnitudes of the level detected in the level detector circuit of the signal transmitted through the process of detection and the predetermined threshold levels for the four-level comparator and the NRZ comparator, whereby stabilized output data conforming to changes in the level of the detected output are made obtainable.",
  "claims": [
    "1. In a demodulator circuit for obtaining output data through comparison, made in a multi-level comparator, of a signal obtained by subjecting a received signal to a process of detection in a detector circuit and predetermined threshold levels, a control circuit of threshold levels for said multi-level comparator in said demodulator circuit comprising: a level detector circuit for detecting the level of said received signal transmitted through the process of detection; and a control circuit for controlling relative magnitudes of the level detected in said level detector circuit of the signal transmitted through the process of detection and the predetermined threshold levels for said multi-level comparator, wherein at least one of the predetermined threshold levels controlled by said control circuit is used for applying feedback control to the detector circuit to handle deviations in an input frequency (IF).",
    "2. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 1, wherein said control circuit sets the predetermined threshold levels for said multi-level comparator on the basis of the level detected in said level detector circuit of the signal transmitted through the process of detection.",
    "3. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 1, wherein said control circuit controls the gain in said detector circuit on the basis of the level detected in said level detector circuit of the signal transmitted through the process of detection.",
    "4. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 1, wherein said level detector circuit is configured to have a high impedance, thereby improving antinoise characteristics.",
    "5. In a demodulator circuit for obtaining output data through comparison, made in a multi-level comparator, of a received signal and predetermined threshold levels, a control circuit of threshold levels for said multi-level comparator in said demodulator circuit comprising: a detector circuit for applying a process of detection to said received signal; a level detector circuit for detecting the level of the signal transmitted through the process of detection in said detector circuit; and a control circuit for controlling relative magnitudes of the level detected in said level detector circuit of the signal transmitted through the process of detection and the predetermined threshold levels for said multi-level comparator, wherein at least one of the predetermined threshold levels controlled by said control circuit is used for applying feedback control to the detector circuit to handle deviations in an input frequency (IF).",
    "6. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 5, wherein said control circuit sets the predetermined threshold levels for said multi-level comparator on the basis of the level detected in said level detector circuit of the signal transmitted through the process of detection.",
    "7. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 5, wherein said control circuit controls the gain in said detector circuit on the basis of the level detected in said level detector circuit of the signal transmitted through the process of detection.",
    "8. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 5, wherein said level detector circuit includes a peak-hold circuit.",
    "9. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 8, wherein said peak-hold circuit holds the peak value and the bottom value and provides a signal compounded of the peak value and the bottom value.",
    "10. A control circuit of threshold levels for a multi-level comparator in a demodulator circuit according to claim 5, wherein said level detector circuit is configured to have a high impedance, thereby improving antinoise characteristics."
  ],
  "description_excerpt": "The invention, in a demodulator circuit such as a pager, relates to a control circuit of threshold levels for a multi-level comparator in the demodulator circuit for detecting a multi-level signal with the use of the comparator.\n\nIn a demodulator circuit such as a pager, a multi-level comparator is used for receiving and demodulating a multi-level signal and it is practiced therein to compare the signal transmitted through the process of detection and predetermined threshold levels to obtain the desired signal.\n\nFIG. 1 and FIG. 2 are circuit diagrams explanatory of related art examples. In the circuit shown in FIG. 1, a current output of a detector is input to two comparators 1 and 2 through a low-pass filter (LPF) to be compared therein with their respective different threshold levels and, thereby, output data corresponding to the multivalued data is obtained. Further, in the above described circuit, it is adapted such that the average voltage of the detected output is detected in an average voltage detector circuit 4 and the same is fed back to a comparator 5 as its threshold level and, thereby, the operating point of the detected output is shifted.\n\nIn the circuit shown in FIG. 2, it is adapted such that a detector output is input to two comparators 11 and 12 through a low-pass filter (LPF) to be compared with their respective different threshold levels and, thereby, output data corresponding to the multivalued data is obtained.",
  "cpc": [
    "H04L 25/4917",
    "H03D 1/02",
    "H03D 1/22",
    "H03D 2200/0045",
    "H04L 25/062",
    "H04L 25/063"
  ],
  "ipc": [
    "H03M 5/20",
    "H04L 25/06",
    "H04L 25/49",
    "H04L 27/144"
  ],
  "assignees": [
    "Sony Corp"
  ],
  "inventors": [
    "Shouichi Kuroki"
  ],
  "filing_date": "1997-11-20",
  "publication_date": "2001-01-09",
  "grant_date": "2001-01-09",
  "priority_date": "1996-11-28",
  "application_number": "US-97487997-A",
  "family_id": "18091443",
  "cited_by_count": 51,
  "citations": [
    "US4250458A",
    "US4553102A",
    "EP0291947A2",
    "EP0307887A2",
    "US5077538A",
    "EP0362949A2",
    "US4873702A",
    "US5052021A",
    "US5343499A",
    "US5521941A",
    "US5175749A",
    "US5400366A",
    "US5303416A",
    "US5425056A",
    "US5670951A"
  ]
}