MLchartDataset catalogue

Patent · US11687264B2 · B2 · US

Technologies for accelerator interface

(11) Publication number
US11687264B2
(21) Application number
15/721,053
(22) Filing date
2017-09-29
(30) Priority date
2016-11-29
(43) Publication date
2023-06-27
(45) Date of grant
2023-06-27
(51) IPC
H04L 12/28; H04L 12/46; H04L 47/20; G06F 11/07; G06F 11/30; G06F 11/34; G06F 12/02; G06F 12/06; G06F 13/16; G06F 16/174; G06F 21/57; G06F 21/62; G06F 21/73; G06F 21/76; G06F 3/06; G06F 7/06; G06F 8/65; G06F 8/654; G06F 8/656; G06F 8/658; G06F 9/38; G06F 9/4401; G06F 9/455; G06F 9/48; G06F 9/50; G06F 9/54; G06T 1/20; G06T 1/60; G06T 9/00; H01R 13/453; H01R 13/631; H03K 19/173; H03M 7/30; H03M 7/40; H03M 7/42; H04L 41/044; H04L 41/0816; H04L 41/0853; H04L 41/12; H04L 43/04; H04L 43/06; H04L 43/08; H04L 43/0894; H04L 47/2441; H04L 49/104; H04L 61/5007; H04L 67/10; H04L 67/1014; H04L 67/63; H04L 67/75; H04L 9/08; H05K 7/14
(52) CPC
  • G06F Electric digital data processing: 9/5005, 11/0709, 11/0751, 11/079, 11/1453, 11/3006, 11/3034, 11/3055, 11/3079, 11/3409, 12/023, 12/0284, 12/0692, 13/1652, 13/4022, 13/4027, 15/161, 15/80, 16/1744, 16/285, 21/44, 21/57, 21/6218, 21/70, 21/73, 21/76, 2212/401, 2212/402, 2221/2107, 3/0604, 3/0608, 3/0611, 3/0613, 3/0617, 3/0641, 3/0647, 3/065, 3/0653, 3/067, 7/06, 8/65, 8/654, 8/656, 8/658, 9/3851, 9/3891, 9/4401, 9/45533, 9/4843, 9/4881, 9/5038, 9/5044, 9/505, 9/5083, 9/544
  • G06T Image data processing or generation, in general: 1/20, 1/60, 9/005
  • H01R Electrically-conductive connections; structural associations of a plurality of mutually-insulated electrical connecting elements; coupling devices; current collectors: 13/453, 13/4536, 13/4538, 13/631
  • H03K Pulse technique: 19/1731
  • H03M Coding; decoding; code conversion in general: 7/3084, 7/40, 7/42, 7/60, 7/6011, 7/6017, 7/6029
  • H04L Transmission of digital information, e.g. telegraphic communication: 12/2881, 12/4633, 41/044, 41/046, 41/0816, 41/0853, 41/0895, 41/0896, 41/12, 41/142, 41/40, 43/04, 43/06, 43/08, 43/0894, 47/20, 47/2441, 47/78, 47/83, 49/104, 61/5007, 63/1425, 67/10, 67/1014, 67/63, 67/75, 9/0822
  • H04Q Selecting: 11/0005
  • H05K Printed circuits; casings or constructional details of electric apparatus; manufacture of assemblages of electrical components: 7/1447, 7/1452, 7/1487, 7/1491, 7/1492
(73) Assignee
Intel Corp
(72) Inventors
Chih-Jen Chang; Brad Burres; Jose Niell; Dan Biederman; Robert Cone; Pat Wang; Kenneth Keels; Patrick Fleming
(54) Title
Technologies for accelerator interface
(57) Abstract

Technologies for an accelerator interface over Ethernet are disclosed. In the illustrative embodiment, a network interface controller of a compute device may receive a data packet. If the network interface controller determines that the data packet should be pre-processed (e.g., decrypted) with a remote accelerator device, the network interface controller may encapsulate the data packet in an encapsulating network packet and send the encapsulating network packet to a remote accelerator device on a remote compute device. The remote accelerator device may pre-process the data packet (e.g., decrypt the data packet) and send it back to the network interface controller. The network interface controller may then send the pre-processed packet to a processor of the compute device.

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Claims (27)

  1. An apparatus comprising: a network interface controller comprising circuitry to: receive a data packet; encapsulate the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the data packet; send the encapsulating network packet to an accelerator device for processing; receive, from the accelerator device, an encapsulating response network packet which includes a processed data packet that is based on the data packet; provide the processed data packet to a processor; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and provide the transaction data to the accelerator device to perform a transaction based on the transaction data.
  2. The apparatus of claim 1, wherein to encapsulate the data packet in the encapsulating network packet comprises encapsulate the data packet in an Ethernet packet.
  3. The apparatus of claim 1, wherein to send the encapsulating network packet to the accelerator device for processing comprises to send the encapsulating network packet to the accelerator device for decryption and wherein to receive the encapsulating response network packet which includes the processed data packet comprises to receive the encapsulating response network packet which includes decrypted content of the data packet.
  4. The apparatus of claim 1, wherein the network interface controller is further to: receive a second data packet; and provide the second data packet to the accelerator device for processing, wherein the accelerator device is to process the second data packet and provide the processed second data packet to the network interface controller, wherein the network interface controller is further to provide the processed second data packet to the processor.
  5. The apparatus of claim 4, wherein to process the second data packet comprises to decrypt the second data packet.
  6. The apparatus of claim 1, wherein the network interface controller is to: provide second transaction data to the accelerator device, wherein the second transaction data indicates a transaction to be performed by the accelerator device on content of at least one packet received from the network interface controller.
  7. The apparatus of claim 1, wherein the processor is to provide a second data packet to the network interface controller, and wherein the network interface controller is further to: encapsulate the second data packet in a second encapsulating network packet; send the second encapsulating network packet to the accelerator device for processing; receive, from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and send the second processed data packet over a network.
  8. The apparatus of claim 1, comprising the processor.
  9. The apparatus of claim 1, comprising the accelerator device.
  10. A method comprising: receiving, by a network interface controller, a data packet; encapsulating, by the network interface controller, the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the data packet; sending, by the network interface controller, the encapsulating network packet to an accelerator device for processing; receiving, by the network interface controller and from the accelerator device, an encapsulating response network packet which includes a version of the data packet after processing; providing, by the network interface controller, the processed data packet to a processor; receiving, by the network interface controller, a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and providing, by the network interface controller, the transaction data to the accelerator device to perform a transaction based on the transaction data.
  11. The method of claim 10, wherein encapsulating the data packet in the encapsulating network packet comprises encapsulating the data packet in an Ethernet packet.
  12. The method of claim 10, wherein sending the encapsulating network packet to the accelerator device for processing comprises sending the encapsulating network packet to the accelerator device for decrypting, and wherein receiving the encapsulating response network packet which includes the data packet after processing comprises receiving the encapsulating response network packet which includes the data packet after decryption.
  13. The method of claim 10, further comprising: receiving, by the network interface controller, a second data packet; providing, by the network interface controller, the second data packet to a second accelerator device for processing; and providing, by the network interface controller, processed second data packet from the second accelerator device to the processor.
  14. The method of claim 13, wherein processing the second data packet comprises decrypting the second data packet.
  15. The method of claim 10, further comprising: receiving transaction data at the network interface controller, wherein the transaction data indicates a transaction to be performed on the accelerator device; encapsulating, by the network interface controller, the transaction data in a second encapsulating network packet; and sending, by the network interface controller, the second encapsulating network packet to the accelerator device.
  16. The method of claim 10, further comprising: receiving, from the processor, a second data packet at the network interface controller encapsulating, by the network interface controller, the second data packet in a second encapsulating network packet; sending, by the network interface controller, the second encapsulating network packet to the accelerator device for processing; receiving, by the network interface controller and from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and sending, by the network interface controller, the second processed data packet over a network.
  17. A compute device comprising: circuitry for receiving a data packet at a network interface controller; means for encapsulating the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the received data packet; circuitry for sending the encapsulating network packet to an accelerator device for processing; circuitry for receiving, from the accelerator device, an encapsulating response network packet which includes the data packet after processing; means for providing the processed data packet to a processor of the compute device; means for receiving a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and means for providing the transaction data to the accelerator device to perform a transaction based on the transaction data.
  18. The compute device of claim 17, wherein the circuitry for sending the encapsulating network packet to the accelerator device for processing comprises circuitry for sending the encapsulating network packet to the accelerator device for decrypting, and wherein the circuitry for receiving the encapsulating response network packet which includes the data packet after processing comprises circuitry for receiving the encapsulating response network packet which includes the data packet after decryption.
  19. The compute device of claim 17, further comprising; a second accelerator device; means for receiving, by the network interface controller, a second data packet; means for providing, by the network interface controller, the second data packet to the second accelerator device for processing; and means for providing, by the network interface controller, the second data packet processed by the second accelerator device to the processor of the compute device.
  20. The compute device of claim 17, further comprising: means for receiving a second data packet, from the processor, at the network interface controller; means for encapsulating, by the network interface controller, the second data packet in a second encapsulating network packet; means for sending, by the network interface controller, the second encapsulating network packet to the accelerator device for processing; means for receiving, by the network interface controller and from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and means for sending, by the network interface controller, the second processed data packet over a network.
  21. An apparatus comprising: a network interface controller and circuitry to provide transaction data to the network interface controller, wherein the transaction data is to indicate a transaction to be performed on an accelerator device and wherein the network interface controller is to: encapsulate the transaction data in an encapsulating network packet; send the encapsulating network packet to the accelerator device; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate second transaction data; and provide the second transaction data to the accelerator device, wherein the accelerator device is further to perform a transaction based on the second transaction data.
  22. The apparatus of claim 21, wherein to encapsulate the transaction data in the encapsulating network packet comprises to encapsulate the transaction data in an Ethernet packet.
  23. The apparatus of claim 21, wherein the second encapsulating network packet comprises an Ethernet packet.
  24. An apparatus comprising: a network interface controller comprising an interface and circuitry, the circuitry to: provide a processed data packet to a processor, wherein the network interface controller is to receive the processed data packet in at least one packet and the processed data packet was processed by an accelerator device based on a request from the network interface controller sent in a first encapsulating network packet; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and provide the transaction data to the accelerator device to perform a transaction based on the transaction data.
  25. The apparatus of claim 24, wherein, prior to receipt of the processed data packet: the network interface controller is to provide the data packet, received by the network interface controller, to the accelerator device in a payload of at least one packet to process the data packet.
  26. The apparatus of claim 24, wherein the network interface controller is to configure the accelerator device to process the data packet.
  27. The apparatus of claim 24, comprising the processor coupled to the network interface controller by the interface.

Description

Certain computing tasks may be performed more quickly by a hardware accelerator, such as a field programmable gate array (FPGA), application specific integrated circuit (ASIC), or graphics processing unit (GPU), than by a central processing unit. Compute devices are increasingly employing hardware accelerators in order to perform suitable computing tasks more quickly. In many applications, the accelerators may be locally accessible to a central processing unit using a Peripheral Component Interconnect Express (PCIe) or similar connection.

One drawback with the incorporation of a hardware accelerator into a compute device is that the hardware accelerator may be unused much of the time. Depending on the particular task being performed by the compute device, the hardware accelerator may experience a high level of use some times and a low or no level of use at other times, which may be an inefficient allocation of resources.

The concepts described herein are illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. Where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements.

FIG. 1 is a diagram of a conceptual overview of a data center in which one or more techniques described herein may be implemented according to various embodiments;

FIG. 2 is a diagram of an example embodiment of a logical configuration of a rack of the data center of FIG. 1;

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Record as JSON
{
  "publication_number": "US11687264B2",
  "country": "US",
  "kind": "B2",
  "title": "Technologies for accelerator interface",
  "abstract": "Technologies for an accelerator interface over Ethernet are disclosed. In the illustrative embodiment, a network interface controller of a compute device may receive a data packet. If the network interface controller determines that the data packet should be pre-processed (e.g., decrypted) with a remote accelerator device, the network interface controller may encapsulate the data packet in an encapsulating network packet and send the encapsulating network packet to a remote accelerator device on a remote compute device. The remote accelerator device may pre-process the data packet (e.g., decrypt the data packet) and send it back to the network interface controller. The network interface controller may then send the pre-processed packet to a processor of the compute device.",
  "claims": [
    "1. An apparatus comprising: a network interface controller comprising circuitry to: receive a data packet; encapsulate the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the data packet; send the encapsulating network packet to an accelerator device for processing; receive, from the accelerator device, an encapsulating response network packet which includes a processed data packet that is based on the data packet; provide the processed data packet to a processor; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and provide the transaction data to the accelerator device to perform a transaction based on the transaction data.",
    "2. The apparatus of claim 1, wherein to encapsulate the data packet in the encapsulating network packet comprises encapsulate the data packet in an Ethernet packet.",
    "3. The apparatus of claim 1, wherein to send the encapsulating network packet to the accelerator device for processing comprises to send the encapsulating network packet to the accelerator device for decryption and wherein to receive the encapsulating response network packet which includes the processed data packet comprises to receive the encapsulating response network packet which includes decrypted content of the data packet.",
    "4. The apparatus of claim 1, wherein the network interface controller is further to: receive a second data packet; and provide the second data packet to the accelerator device for processing, wherein the accelerator device is to process the second data packet and provide the processed second data packet to the network interface controller, wherein the network interface controller is further to provide the processed second data packet to the processor.",
    "5. The apparatus of claim 4, wherein to process the second data packet comprises to decrypt the second data packet.",
    "6. The apparatus of claim 1, wherein the network interface controller is to: provide second transaction data to the accelerator device, wherein the second transaction data indicates a transaction to be performed by the accelerator device on content of at least one packet received from the network interface controller.",
    "7. The apparatus of claim 1, wherein the processor is to provide a second data packet to the network interface controller, and wherein the network interface controller is further to: encapsulate the second data packet in a second encapsulating network packet; send the second encapsulating network packet to the accelerator device for processing; receive, from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and send the second processed data packet over a network.",
    "8. The apparatus of claim 1, comprising the processor.",
    "9. The apparatus of claim 1, comprising the accelerator device.",
    "10. A method comprising: receiving, by a network interface controller, a data packet; encapsulating, by the network interface controller, the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the data packet; sending, by the network interface controller, the encapsulating network packet to an accelerator device for processing; receiving, by the network interface controller and from the accelerator device, an encapsulating response network packet which includes a version of the data packet after processing; providing, by the network interface controller, the processed data packet to a processor; receiving, by the network interface controller, a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and providing, by the network interface controller, the transaction data to the accelerator device to perform a transaction based on the transaction data.",
    "11. The method of claim 10, wherein encapsulating the data packet in the encapsulating network packet comprises encapsulating the data packet in an Ethernet packet.",
    "12. The method of claim 10, wherein sending the encapsulating network packet to the accelerator device for processing comprises sending the encapsulating network packet to the accelerator device for decrypting, and wherein receiving the encapsulating response network packet which includes the data packet after processing comprises receiving the encapsulating response network packet which includes the data packet after decryption.",
    "13. The method of claim 10, further comprising: receiving, by the network interface controller, a second data packet; providing, by the network interface controller, the second data packet to a second accelerator device for processing; and providing, by the network interface controller, processed second data packet from the second accelerator device to the processor.",
    "14. The method of claim 13, wherein processing the second data packet comprises decrypting the second data packet.",
    "15. The method of claim 10, further comprising: receiving transaction data at the network interface controller, wherein the transaction data indicates a transaction to be performed on the accelerator device; encapsulating, by the network interface controller, the transaction data in a second encapsulating network packet; and sending, by the network interface controller, the second encapsulating network packet to the accelerator device.",
    "16. The method of claim 10, further comprising: receiving, from the processor, a second data packet at the network interface controller encapsulating, by the network interface controller, the second data packet in a second encapsulating network packet; sending, by the network interface controller, the second encapsulating network packet to the accelerator device for processing; receiving, by the network interface controller and from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and sending, by the network interface controller, the second processed data packet over a network.",
    "17. A compute device comprising: circuitry for receiving a data packet at a network interface controller; means for encapsulating the data packet in an encapsulating network packet, wherein a payload of the encapsulating network packet includes the received data packet; circuitry for sending the encapsulating network packet to an accelerator device for processing; circuitry for receiving, from the accelerator device, an encapsulating response network packet which includes the data packet after processing; means for providing the processed data packet to a processor of the compute device; means for receiving a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and means for providing the transaction data to the accelerator device to perform a transaction based on the transaction data.",
    "18. The compute device of claim 17, wherein the circuitry for sending the encapsulating network packet to the accelerator device for processing comprises circuitry for sending the encapsulating network packet to the accelerator device for decrypting, and wherein the circuitry for receiving the encapsulating response network packet which includes the data packet after processing comprises circuitry for receiving the encapsulating response network packet which includes the data packet after decryption.",
    "19. The compute device of claim 17, further comprising; a second accelerator device; means for receiving, by the network interface controller, a second data packet; means for providing, by the network interface controller, the second data packet to the second accelerator device for processing; and means for providing, by the network interface controller, the second data packet processed by the second accelerator device to the processor of the compute device.",
    "20. The compute device of claim 17, further comprising: means for receiving a second data packet, from the processor, at the network interface controller; means for encapsulating, by the network interface controller, the second data packet in a second encapsulating network packet; means for sending, by the network interface controller, the second encapsulating network packet to the accelerator device for processing; means for receiving, by the network interface controller and from the accelerator device, a second encapsulating response network packet which includes a second processed data packet; and means for sending, by the network interface controller, the second processed data packet over a network.",
    "21. An apparatus comprising: a network interface controller and circuitry to provide transaction data to the network interface controller, wherein the transaction data is to indicate a transaction to be performed on an accelerator device and wherein the network interface controller is to: encapsulate the transaction data in an encapsulating network packet; send the encapsulating network packet to the accelerator device; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate second transaction data; and provide the second transaction data to the accelerator device, wherein the accelerator device is further to perform a transaction based on the second transaction data.",
    "22. The apparatus of claim 21, wherein to encapsulate the transaction data in the encapsulating network packet comprises to encapsulate the transaction data in an Ethernet packet.",
    "23. The apparatus of claim 21, wherein the second encapsulating network packet comprises an Ethernet packet.",
    "24. An apparatus comprising: a network interface controller comprising an interface and circuitry, the circuitry to: provide a processed data packet to a processor, wherein the network interface controller is to receive the processed data packet in at least one packet and the processed data packet was processed by an accelerator device based on a request from the network interface controller sent in a first encapsulating network packet; receive a second encapsulating network packet, wherein the second encapsulating network packet is to encapsulate transaction data; and provide the transaction data to the accelerator device to perform a transaction based on the transaction data.",
    "25. The apparatus of claim 24, wherein, prior to receipt of the processed data packet: the network interface controller is to provide the data packet, received by the network interface controller, to the accelerator device in a payload of at least one packet to process the data packet.",
    "26. The apparatus of claim 24, wherein the network interface controller is to configure the accelerator device to process the data packet.",
    "27. The apparatus of claim 24, comprising the processor coupled to the network interface controller by the interface."
  ],
  "description_excerpt": "Certain computing tasks may be performed more quickly by a hardware accelerator, such as a field programmable gate array (FPGA), application specific integrated circuit (ASIC), or graphics processing unit (GPU), than by a central processing unit. Compute devices are increasingly employing hardware accelerators in order to perform suitable computing tasks more quickly. In many applications, the accelerators may be locally accessible to a central processing unit using a Peripheral Component Interconnect Express (PCIe) or similar connection.\n\nOne drawback with the incorporation of a hardware accelerator into a compute device is that the hardware accelerator may be unused much of the time. Depending on the particular task being performed by the compute device, the hardware accelerator may experience a high level of use some times and a low or no level of use at other times, which may be an inefficient allocation of resources.\n\nThe concepts described herein are illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. Where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements.\n\nFIG. 1 is a diagram of a conceptual overview of a data center in which one or more techniques described herein may be implemented according to various embodiments;\n\nFIG. 2 is a diagram of an example embodiment of a logical configuration of a rack of the data center of FIG. 1;",
  "cpc": [
    "G06F 9/5005",
    "G06F 11/0709",
    "G06F 11/0751",
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    "H04L 67/10",
    "H04L 67/1014",
    "H04L 67/63",
    "H04L 67/75",
    "H04L 9/08",
    "H05K 7/14"
  ],
  "assignees": [
    "Intel Corp"
  ],
  "inventors": [
    "Chih-Jen Chang",
    "Brad Burres",
    "Jose Niell",
    "Dan Biederman",
    "Robert Cone",
    "Pat Wang",
    "Kenneth Keels",
    "Patrick Fleming"
  ],
  "filing_date": "2017-09-29",
  "publication_date": "2023-06-27",
  "grant_date": "2023-06-27",
  "priority_date": "2016-11-29",
  "application_number": "US-201715721053-A",
  "family_id": "62190163",
  "cited_by_count": 7,
  "citations": [
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    "US20200218684A1",
    "US20190207868A1"
  ]
}

Record 736 of 8,000 in Patents full text (MLC-0201). Request the full dataset.