Technologies for managing a flexible host interface of a network interface controller

{
  "publication_number": "US11843691B2",
  "country": "US",
  "kind": "B2",
  "title": "Technologies for managing a flexible host interface of a network interface controller",
  "abstract": "Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.",
  "claims": [
    "1. Network interface controller circuitry for use in at least one network node, the at least one network node to be associated with compute circuitry, network switch circuitry, and storage circuitry, the network interface controller circuitry to be used in network communication with at least one other network node via at least one network fabric, the network interface controller circuitry comprising: processor core circuitry configurable to perform pipeline operations; accelerator circuitry to perform cryptographic-related operations and network communication-related operations; fabric circuitry to be used in data communication between the processor core circuitry and the accelerator circuitry; and interface circuitry for use in Peripheral Component Interconnect Express (PCIe) communication associated with the at least one network node; wherein: a circuit board comprises the network interface controller circuitry; the processor core circuitry comprises multiple processor cores that are on-die, at least in part; the network interface controller circuitry is for use in Ethernet communication and remote direct memory access (RDMA) communication with the at least one other network node via the at least one network fabric; the compute circuitry comprises physical central processing unit circuitry, graphics processing unit circuitry, and/or field programmable gate array (FPGA) circuitry; the at least one other network node comprises physical resources that are physically disaggregated from the network interface controller circuitry, the compute circuitry, the network switch circuitry, and/or the storage circuitry; the physical resources comprise physical compute resources and physical storage resources; at least respective portions of the compute circuitry and of the physical compute resources are dynamically configurable, in accordance with software-defined provisioning, as at least one pool of compute resources; at least respective portions of the storage circuitry and the physical storage resources are dynamically configurable, in accordance with the software-defined provisioning, as at least one pool of storage resources; and quality of service is to be implemented in association with at least one service that is to be provided, at least in part, via the network interface controller circuitry.",
    "2. The network interface controller circuitry of claim 1, wherein: telemetry data is to be obtained from the nodes for use in management-related operations.",
    "3. The network interface controller circuitry of claim 2, wherein: the at least one service is related, at least in part, to: software as service; platform as service, and/or infrastructure as service.",
    "4. The network interface controller circuitry of claim 2, wherein: the storage circuitry and the physical storage resources comprise solid state drive storage.",
    "5. The network interface controller circuitry of claim 4, wherein: the at least one network node and the at least one other network node are comprised in a plurality of racks; and the plurality of racks are to be comprised in at least one data center.",
    "6. The network interface controller circuitry of claim 5, wherein: the network interface controller circuitry comprises offload-related circuitry to perform checksum offload-related operations and segmentation offload-related operations.",
    "7. The network interface controller circuitry of claim 6, wherein: the network interface controller circuitry is configurable to be partitioned into multiple local interfaces.",
    "8. At least one non-transitory computer-readable medium storing instructions to be executed by network interface controller circuitry, the network interface controller circuitry being for use in at least one network node, the at least one network node to be associated with compute circuitry, network switch circuitry, and storage circuitry, the network interface controller circuitry to be used in network communication with at least one other network node via at least one network fabric, the instructions when executed by the network interface controller circuitry resulting in the network interface controller circuitry being configured for performance of operations comprising: configuring processor core circuitry of the network interface controller circuitry to perform pipeline operations; performing, by accelerator circuitry of the network interface controller circuitry, cryptographic-related operations and network communication-related operations; carrying out, via fabric circuitry of the network interface controller circuitry, data communication between the processor core circuitry and the accelerator circuitry; and using interface circuitry of the network interface controller circuitry in Peripheral Component Interconnect Express (PCIe) communication associated with the at least one network node; wherein: a circuit board comprises the network interface controller circuitry; the processor core circuitry comprises multiple processor cores that are on-die, at least in part; the network interface controller circuitry is for use in Ethernet communication and remote direct memory access (RDMA) communication with the at least one other network node via the at least one network fabric; the compute circuitry comprises physical central processing unit circuitry, graphics processing unit circuitry, and/or field programmable gate array (FPGA) circuitry; the at least one other network node comprises physical resources that are physically disaggregated from the network interface controller circuitry, the compute circuitry, the network switch circuitry, and/or the storage circuitry; the physical resources comprise physical compute resources and physical storage resources; at least respective portions of the compute circuitry and of the physical compute resources are dynamically configurable, in accordance with software-defined provisioning, as at least one pool of compute resources; at least respective portions of the storage circuitry and the physical storage resources are dynamically configurable, in accordance with the software-defined provisioning, as at least one pool of storage resources; and quality of service is to be implemented in association with at least one service that is to be provided, at least in part, via the network interface controller circuitry.",
    "9. The at least one non-transitory computer-readable medium of claim 8, wherein: telemetry data is to be obtained from the nodes for use in management-related operations.",
    "10. The at least one non-transitory computer-readable medium of claim 9, wherein: the at least one service is related, at least in part, to: software as service; platform as service, and/or infrastructure as service.",
    "11. The at least one non-transitory computer-readable medium of claim 9, wherein: the storage circuitry and the physical storage resources comprise solid state drive storage.",
    "12. The at least one non-transitory computer-readable medium of claim 11, wherein: the at least one network node and the at least one other network node are comprised in a plurality of racks; and the plurality of racks are to be comprised in at least one data center.",
    "13. The at least one non-transitory computer-readable medium of claim 12, wherein: the network interface controller circuitry comprises offload-related circuitry to perform checksum offload-related operations and segmentation offload-related operations.",
    "14. The at least one non-transitory computer-readable medium of claim 13, wherein: the network interface controller circuitry is configurable to be partitioned into multiple local interfaces.",
    "15. Computer system usable in association with at least one data center, the computer system comprising: at least one network node comprising a circuit board that comprises network interface controller circuitry; at least one network fabric; compute circuitry that comprises physical central processing unit circuitry, graphics processing unit circuitry, and/or field programmable gate array (FPGA) circuitry; network switch circuitry; storage circuitry; and at least one other network node that comprises physical resources that are physically disaggregated from the network interface controller circuitry, the compute circuitry, the network switch circuitry, and/or the storage circuitry, the physical resources comprising physical compute resources and physical storage resources; wherein: the network interface controller circuitry is to be used in network communication with the at least one other network node via the at least one network fabric; the network interface controller circuitry is for use in Ethernet communication and remote direct memory access (RDMA) communication with the at least one other network node via the at least one network fabric; the network interface controller circuitry comprises: processor core circuitry configurable to perform pipeline operations, the processor core circuitry comprising multiple processor cores that are on-die, at least in part; accelerator circuitry to perform cryptographic-related operations and network communication-related operations; fabric circuitry to be used in data communication between the processor core circuitry and the accelerator circuitry; and interface circuitry for use in Peripheral Component Interconnect Express (PCIe) communication associated with the at least one network node; at least respective portions of the compute circuitry and of the physical compute resources are dynamically configurable, in accordance with software-defined provisioning, as at least one pool of compute resources; at least respective portions of the storage circuitry and the physical storage resources are dynamically configurable, in accordance with the software-defined provisioning, as at least one pool of storage resources; and quality of service is to be implemented in association with at least one service that is to be provided, at least in part, via the network interface controller circuitry.",
    "16. The computer system of claim 15, wherein: telemetry data is to be obtained from the nodes for use in management-related operations.",
    "17. The computer system of claim 16, wherein: the at least one service is related, at least in part, to: software as service; platform as service, and/or infrastructure as service.",
    "18. The computer system of claim 16, wherein: the storage circuitry and the physical storage resources comprise solid state drive storage.",
    "19. The computer system of claim 18, wherein: the at least one network node and the at least one other network node are comprised in a plurality of racks; and the plurality of racks are to be comprised in the at least one data center.",
    "20. The computer system of claim 19, wherein: the network interface controller circuitry comprises offload-related circuitry to perform checksum offload-related operations and segmentation offload-related operations.",
    "21. The computer system of claim 20, wherein: the network interface controller circuitry is configurable to be partitioned into multiple local interfaces.",
    "22. At least one non-transitory computer-readable medium storing instructions, the instructions to be executed by circuitry comprised in a computer system that is usable in association with at least one data center, the computer system comprising (1) at least one network node comprising a circuit board that comprises network interface controller circuitry, (2) at least one network fabric, (3) compute circuitry that comprises physical central processing unit circuitry, graphics processing unit circuitry, and/or field programmable gate array (FPGA) circuitry, (4) network switch circuitry, (5) storage circuitry, and (6) at least one other network node that comprises physical resources that are physically disaggregated from the network interface controller circuitry, the compute circuitry, the network switch circuitry, and/or the storage circuitry, the physical resources comprising physical compute resources and physical storage resources, the instructions, when executed, resulting in the computer system being configured for performance of operations comprising: dynamically configuring at least respective portions of the compute circuitry and of the physical compute resources, in accordance with software-defined provisioning, as at least one pool of compute resources; dynamically configuring at least respective portions of the storage circuitry and the physical storage resources, in accordance with the software-defined provisioning, as at least one pool of storage resources; and implementing quality of service in association with at least one service that is to be provided, at least in part, via the network interface controller circuitry; wherein: the network interface controller circuitry is to be used in network communication with the at least one other network node via the at least one network fabric; the network interface controller circuitry is for use in Ethernet communication and remote direct memory access (RDMA) communication with the at least one other network node via the at least one network fabric; the network interface controller circuitry comprises: processor core circuitry configurable to perform pipeline operations, the processor core circuitry comprising multiple processor cores that are on-die, at least in part; accelerator circuitry to perform cryptographic-related operations and network communication-related operations; fabric circuitry to be used in data communication between the processor core circuitry and the accelerator circuitry; and interface circuitry for use in Peripheral Component Interconnect Express (PCIe) communication associated with the at least one network node.",
    "23. The at least one non-transitory computer-readable medium of claim 22, wherein: telemetry data is to be obtained from the nodes for use in management-related operations.",
    "24. The at least one non-transitory computer-readable medium of claim 23, wherein: the at least one service is related, at least in part, to: software as service; platform as service, and/or infrastructure as service.",
    "25. The at least one non-transitory computer-readable medium of claim 23, wherein: the storage circuitry and the physical storage resources comprise solid state drive storage.",
    "26. The at least one non-transitory computer-readable medium of claim 25, wherein: the at least one network node and the at least one other network node are comprised in a plurality of racks; and the plurality of racks are to be comprised in the at least one data center.",
    "27. The at least one non-transitory computer-readable medium of claim 26, wherein: the network interface controller circuitry comprises offload-related circuitry to perform checksum offload-related operations and segmentation offload-related operations.",
    "28. The at least one non-transitory computer-readable medium of claim 27, wherein: the network interface controller circuitry is configurable to be partitioned into multiple local interfaces."
  ],
  "description_excerpt": "In present packet-switched network architectures, data is transmitted in the form of network packets between compute devices and/or device components at a rapid pace. At a high level, data is packetized into a network packet, which is transmitted by a network interface controller (NIC) of one network compute device and received by a NIC of another network compute device. Upon receipt, the network packet is typically processed, classified, etc., and the payload is typically written to memory (e.g., cache, main memory, etc.). Upon having written the network packet data to memory, the receiving NIC may then notify a host central processing unit (CPU) that the data is available for further processing.\n\nTypically, the NIC includes an interface configured to manage the communications between the host CPU and the NIC (e.g., via peripheral component interconnect express (PCI-e)). Accordingly, the NIC can support various features, such as interrupts, direct memory access (DMA) interfaces to the host processors, support for multiple receive and transmit queues, partitioning into multiple logical interfaces, network traffic processing, offloading, etc. To do so, the interface relies on one or more protocols for host software and NIC hardware integration (e.g., to manage messages/communications between host virtual machines (VMs) and physical NIC functions). However, under certain conditions, certain software interface languages may not be supported by a particular NIC, such as may be based on the NIC's vendor, model, etc.",
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  "assignees": [
    "Intel Corp"
  ],
  "inventors": [
    "Thomas E. Willis",
    "Brad Burres",
    "Amit Kumar"
  ],
  "filing_date": "2021-06-10",
  "publication_date": "2023-12-12",
  "grant_date": "2023-12-12",
  "priority_date": "2017-08-30",
  "application_number": "US-202117344253-A",
  "family_id": "65037934",
  "cited_by_count": 0,
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}