Patent · US2017172007A1 · A1 · US
Multi-slot plug-in card
- (11) Publication number
- US2017172007A1
- (21) Application number
- 14/963,266
- (22) Filing date
- 2015-12-09
- (30) Priority date
- 2015-12-09
- (43) Publication date
- 2017-06-15
- (51) IPC
- H05K 3/46; H05K 7/14; G06F 1/18; H05K 1/11
- (52) CPC
- (73) Assignee
- Mellanox Technologies Ltd
- (72) Inventors
- Yuval Itkin; Avraham Ganor; Andrey Blyahman
- (54) Title
- Multi-slot plug-in card
- (57) Abstract
Electronic apparatus includes a laminated multi-layer circuit substrate, including first and second rigid cards and a flexible section between the first and second rigid cards. First and second sets of electrical terminals are disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard. At least one bus interface circuit is configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card. Printed conductors run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card.
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Claims (1)
- Electronic apparatus, comprising: a laminated multi-layer circuit substrate, comprising first and second rigid cards and a flexible section between the first and second rigid cards; first and second sets of electrical terminals disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard; at least one bus interface circuit, configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card; and printed conductors running continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connecting the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card. 2. The apparatus according to claim 1, wherein the first and second sets of the electrical terminals are configured as edge connectors, which plug into the respective bus connectors. 3. The apparatus according to claim 2, wherein the substrate and edge connectors are configured so that the edge connectors plug into the respective bus connectors in a pair of neighboring bus slots on a backplane. 4. The apparatus according to claim 1, wherein there are no active electronic components on the second rigid card. 5. The apparatus according to claim 1, wherein the respective bus connectors are configured in accordance with a PCI Express standard. 6. The apparatus according to claim 1, wherein the at least one bus interface circuit comprises first and second bus interface circuits, which are disposed on the first rigid card and are connected respectively to the first and second sets of the electrical terminals. 7. The apparatus according to claim 1, wherein the respective bus connectors comprise first and second bus connectors disposed on first and second buses, which are associated respectively with different, first and second central processing units. 8. A method for production, comprising: forming a laminated multi-layer circuit substrate, comprising first and second rigid cards and a flexible section between the first and second rigid cards; depositing first and second sets of electrical terminals respectively on the first and second rigid cards in an arrangement defined so as to mate with respective bus connectors configured in accordance with a predefined bus standard; placing on the first rigid card at least one bus interface circuit that is configured to communicate over a bus in accordance with the predefined bus standard; and printing conductors on the substrate so as to run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card. 9. The method according to claim 8, wherein depositing the first and second sets of the electrical terminals comprises incorporating the electrical terminals in edge connectors, which plug into the respective bus connectors. 10. The method according to claim 9, wherein the substrate and edge connectors are configured so that the edge connectors plug into the respective bus connectors in a pair of neighboring bus slots on a backplane. 11. The method according to claim 8, wherein there are no active electronic components on the second rigid card. 12. The method according to claim 8, wherein the respective bus connectors are configured in accordance with a PCI Express standard. 13. The method according to claim 8, wherein placing the at least one bus interface circuit comprises mounting first and second bus interface circuits on the first rigid card, and connecting the first and second bus interface circuits respectively to the first and second sets of the electrical terminals. 14. The method according to claim 8, and comprising plugging the first and second rigid cards respectively into first and second bus connectors disposed on first and second buses, which are associated respectively with different, first and second central processing units.
Description
The present invention relates generally to electronic circuits and systems, and particularly to circuit boards used in computers.
Many computers have plug-in bus architectures, with a motherboard or other backplane having multiple bus slots. Each slot accommodates a single printed circuit board (PCB), with a bus controller circuit on the board to transmit and receive communications over the bus. Recently, Intel® introduced processors with interfaces to the PCI Express (PCIe®) bus that are capable of “PCIe slot bifurcation,” meaning that different groups of bus lanes can be operated separately by different controllers. In this regard, for example, U.S. Patent Application Publication 2012/0260015 describes a PCIe port bifurcation card that includes a PCIe interface and a plurality of PCIe devices, each independently coupled to the interface via an unswitched connection. In most systems, however, each plug-in card is limited to a single bus interface.
Some plug-in cards are capable of connecting to multiple bus slots. For example, U.S. Pat. No. 5,572,688 describes a computer that has a primary bus including a primary bus interconnection slot and a secondary bus including a secondary bus interconnection slot. A primary bus card has a primary bus connector region for connection with the primary bus interconnection slot. The primary bus card includes a processing circuit electrically connected to the primary bus connector region to process primary bus signals from the primary bus. In addition, the primary bus card has a bridge cable connector electrically connected to the processing circuit.
Citations (3)
- US5224023A
- US6590781B2
- US20100307798A1
Record as JSON
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"publication_number": "US2017172007A1",
"country": "US",
"kind": "A1",
"title": "Multi-slot plug-in card",
"abstract": "Electronic apparatus includes a laminated multi-layer circuit substrate, including first and second rigid cards and a flexible section between the first and second rigid cards. First and second sets of electrical terminals are disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard. At least one bus interface circuit is configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card. Printed conductors run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card.",
"claims": [
"1. Electronic apparatus, comprising: a laminated multi-layer circuit substrate, comprising first and second rigid cards and a flexible section between the first and second rigid cards; first and second sets of electrical terminals disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard; at least one bus interface circuit, configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card; and printed conductors running continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connecting the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card. 2. The apparatus according to claim 1, wherein the first and second sets of the electrical terminals are configured as edge connectors, which plug into the respective bus connectors. 3. The apparatus according to claim 2, wherein the substrate and edge connectors are configured so that the edge connectors plug into the respective bus connectors in a pair of neighboring bus slots on a backplane. 4. The apparatus according to claim 1, wherein there are no active electronic components on the second rigid card. 5. The apparatus according to claim 1, wherein the respective bus connectors are configured in accordance with a PCI Express standard. 6. The apparatus according to claim 1, wherein the at least one bus interface circuit comprises first and second bus interface circuits, which are disposed on the first rigid card and are connected respectively to the first and second sets of the electrical terminals. 7. The apparatus according to claim 1, wherein the respective bus connectors comprise first and second bus connectors disposed on first and second buses, which are associated respectively with different, first and second central processing units. 8. A method for production, comprising: forming a laminated multi-layer circuit substrate, comprising first and second rigid cards and a flexible section between the first and second rigid cards; depositing first and second sets of electrical terminals respectively on the first and second rigid cards in an arrangement defined so as to mate with respective bus connectors configured in accordance with a predefined bus standard; placing on the first rigid card at least one bus interface circuit that is configured to communicate over a bus in accordance with the predefined bus standard; and printing conductors on the substrate so as to run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card. 9. The method according to claim 8, wherein depositing the first and second sets of the electrical terminals comprises incorporating the electrical terminals in edge connectors, which plug into the respective bus connectors. 10. The method according to claim 9, wherein the substrate and edge connectors are configured so that the edge connectors plug into the respective bus connectors in a pair of neighboring bus slots on a backplane. 11. The method according to claim 8, wherein there are no active electronic components on the second rigid card. 12. The method according to claim 8, wherein the respective bus connectors are configured in accordance with a PCI Express standard. 13. The method according to claim 8, wherein placing the at least one bus interface circuit comprises mounting first and second bus interface circuits on the first rigid card, and connecting the first and second bus interface circuits respectively to the first and second sets of the electrical terminals. 14. The method according to claim 8, and comprising plugging the first and second rigid cards respectively into first and second bus connectors disposed on first and second buses, which are associated respectively with different, first and second central processing units."
],
"description_excerpt": "The present invention relates generally to electronic circuits and systems, and particularly to circuit boards used in computers.\n\nMany computers have plug-in bus architectures, with a motherboard or other backplane having multiple bus slots. Each slot accommodates a single printed circuit board (PCB), with a bus controller circuit on the board to transmit and receive communications over the bus. Recently, Intel® introduced processors with interfaces to the PCI Express (PCIe®) bus that are capable of “PCIe slot bifurcation,” meaning that different groups of bus lanes can be operated separately by different controllers. In this regard, for example, U.S. Patent Application Publication 2012/0260015 describes a PCIe port bifurcation card that includes a PCIe interface and a plurality of PCIe devices, each independently coupled to the interface via an unswitched connection. In most systems, however, each plug-in card is limited to a single bus interface.\n\nSome plug-in cards are capable of connecting to multiple bus slots. For example, U.S. Pat. No. 5,572,688 describes a computer that has a primary bus including a primary bus interconnection slot and a secondary bus including a secondary bus interconnection slot. A primary bus card has a primary bus connector region for connection with the primary bus interconnection slot. The primary bus card includes a processing circuit electrically connected to the primary bus connector region to process primary bus signals from the primary bus. In addition, the primary bus card has a bridge cable connector electrically connected to the processing circuit.",
"cpc": [
"H05K 7/1452",
"G06F 1/185",
"G06F 13/40",
"G06F 2213/0026",
"H05K 1/028",
"H05K 1/117",
"H05K 1/148",
"H05K 2201/10189",
"H05K 3/4611",
"H05K 3/4691",
"H05K 7/1439"
],
"ipc": [
"H05K 3/46",
"H05K 7/14",
"G06F 1/18",
"H05K 1/11"
],
"assignees": [
"Mellanox Technologies Ltd"
],
"inventors": [
"Yuval Itkin",
"Avraham Ganor",
"Andrey Blyahman"
],
"filing_date": "2015-12-09",
"publication_date": "2017-06-15",
"priority_date": "2015-12-09",
"application_number": "US-201514963266-A",
"family_id": "59020931",
"cited_by_count": 8,
"citations": [
"US5224023A",
"US6590781B2",
"US20100307798A1"
]
}
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