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Patent · US4002958A · A · US

AC output power control system

(11) Publication number
US4002958A
(21) Application number
05/531,611
(22) Filing date
1974-12-11
(30) Priority date
1973-12-28
(43) Publication date
1977-01-11
(45) Date of grant
1977-01-11
(51) IPC
G05D 3/00; H02M 5/27; H02M 7/48; H02M 7/527; H02P 27/06; H02P 27/08; H02P 8/18
(52) CPC
  • H02M Apparatus for conversion between AC and AC, between AC and DC, or between DC and DC, and for use with mains or similar power supply systems; conversion of DC or AC input power into surge output power; control or regulation thereof: 7/53875, 7/527
(73) Assignee
Mitsubishi Electric Corp
(72) Inventors
Masahiko Akamatsu
(54) Title
AC output power control system
(57) Abstract

An AC output power control system comprising turn-on means controlling at least three or three groups of switches operationally connected between a power source and a load in predetermined order, means for feeding power including at least an AC component from the power source to the load or regenerating it from the load to the power source, and means for selecting two or two groups of the switches among the switches in a predetermined order and for alternatively turning them on and off.

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Claims (7)

  1. A power control system for providing smooth transitions in effective load current by reducing low order AC harmonics, comprising; a plurality of electronic switch means for delivering power to a load, allocating circuit means coupled to said plurality of electronic switch means for turning said switch means on and off in a predetermined sequential order; and, duty cycle control means coupled to said allocating circuit means for varying the duty cycle of individual switching means of said plurality of switch means in response to the phase of said load, and said allocating circuit means together with said duty cycle control means operating to control said plurality of electronic switch means such that one of said electronic switch means is turned on for the same variable interval during which another of said electronic switch means is turned off, whereby low order AC harmonics are reduced.
  2. A system as in claim 1, wherein said allocating circuit means comprises: a plurality of counting circuit means, a plurality of logical product elements coupled to said counting circuit means, said plurality of logical product elements equal in number to twice the number of said counting circuit means; and, a plurality of logical addition elements coupled to said counting circuit means and to said logical product elements, and equal in number to said number of counting circuit means.
  3. A system as in claim 2, wherein said duty cycle control means comprises: pulse width modulator means coupled to said plurality of logical product elements.
  4. A system as in claim 3, further comprising: a second plurality of logical product elements equal in number to said counting circuit means and coupled to said logical addition elements.
  5. A system as in claim 4, further comprising: pulse width modulated signal generator coupled to said second plurality of logical product elements.
  6. A system as in claim 1, further comprising: pulse differentiating means coupled to said duty cycle control means for differentiating the output thereof; and, said pulse differentiating means coupled to an input of said allocating circuit means.
  7. A system as in claim 6 wherein: said pulse differentiating means includes two pulse differentiating circuits.

Description

1. Field of the Invention

The present invention relates to an improved AC output power control system using solid state switches such as an inverter or a cyclo-converter wherein two groups of solid state switches are selected from at least three or three groups of solid state switches are alternatively turned on and off and the two groups are selected in predetermined order for the periods whereby low order harmonics are decreased and a stepless variable frequency control is attained.

The present invention relates to an improved AC output power control system using solid state switches such as an inverter or a cyclo-converter wherein the output current in the overlapping period is controlled and the current increase and decrease rate is controlled so as to decrease the low order harmonics.

2. Description of the Prior Art

FIGS. 1(a), (b), (c) are diagrams of typical embodiments of the AC output circuits using solid state switches 1 wherein solid state switches 1u - 1w or 1up - 1wn are operationally connected between a load 100 and a DC power source 200 1 or an AC power source 200 2.

FIG. 1a shows a three-phase half-wave inverter; FIG. 1b shows a three-phase bridge type inverter; FIG. 1c shows a three-phase half-wave cyclo-converter.

Taking the embodiment of FIG. 1a, in the conventional system, the switches 1u - 1w are respectively turn-on controlled as shown in FIG. 2. In the conventional turn-on control for the drive of an AC motor, a rotation of the magnetic field in the low speed and low frequency output region is in step state and the torque pulsation is high and a smooth rotation is difficult to attain.

Citations (7)

  • US2977518A
  • US3585488A
  • US3573601A
  • US3614590A
  • US3611086A
  • US3649902A
  • US3742330A
Record as JSON
{
  "publication_number": "US4002958A",
  "country": "US",
  "kind": "A",
  "title": "AC output power control system",
  "abstract": "An AC output power control system comprising turn-on means controlling at least three or three groups of switches operationally connected between a power source and a load in predetermined order, means for feeding power including at least an AC component from the power source to the load or regenerating it from the load to the power source, and means for selecting two or two groups of the switches among the switches in a predetermined order and for alternatively turning them on and off.",
  "claims": [
    "1. A power control system for providing smooth transitions in effective load current by reducing low order AC harmonics, comprising; a plurality of electronic switch means for delivering power to a load, allocating circuit means coupled to said plurality of electronic switch means for turning said switch means on and off in a predetermined sequential order; and, duty cycle control means coupled to said allocating circuit means for varying the duty cycle of individual switching means of said plurality of switch means in response to the phase of said load, and said allocating circuit means together with said duty cycle control means operating to control said plurality of electronic switch means such that one of said electronic switch means is turned on for the same variable interval during which another of said electronic switch means is turned off, whereby low order AC harmonics are reduced.",
    "2. A system as in claim 1, wherein said allocating circuit means comprises: a plurality of counting circuit means, a plurality of logical product elements coupled to said counting circuit means, said plurality of logical product elements equal in number to twice the number of said counting circuit means; and, a plurality of logical addition elements coupled to said counting circuit means and to said logical product elements, and equal in number to said number of counting circuit means.",
    "3. A system as in claim 2, wherein said duty cycle control means comprises: pulse width modulator means coupled to said plurality of logical product elements.",
    "4. A system as in claim 3, further comprising: a second plurality of logical product elements equal in number to said counting circuit means and coupled to said logical addition elements.",
    "5. A system as in claim 4, further comprising: pulse width modulated signal generator coupled to said second plurality of logical product elements.",
    "6. A system as in claim 1, further comprising: pulse differentiating means coupled to said duty cycle control means for differentiating the output thereof; and, said pulse differentiating means coupled to an input of said allocating circuit means.",
    "7. A system as in claim 6 wherein: said pulse differentiating means includes two pulse differentiating circuits."
  ],
  "description_excerpt": "1. Field of the Invention\n\nThe present invention relates to an improved AC output power control system using solid state switches such as an inverter or a cyclo-converter wherein two groups of solid state switches are selected from at least three or three groups of solid state switches are alternatively turned on and off and the two groups are selected in predetermined order for the periods whereby low order harmonics are decreased and a stepless variable frequency control is attained.\n\nThe present invention relates to an improved AC output power control system using solid state switches such as an inverter or a cyclo-converter wherein the output current in the overlapping period is controlled and the current increase and decrease rate is controlled so as to decrease the low order harmonics.\n\n2. Description of the Prior Art\n\nFIGS. 1(a), (b), (c) are diagrams of typical embodiments of the AC output circuits using solid state switches 1 wherein solid state switches 1u - 1w or 1up - 1wn are operationally connected between a load 100 and a DC power source 200 1 or an AC power source 200 2.\n\nFIG. 1a shows a three-phase half-wave inverter; FIG. 1b shows a three-phase bridge type inverter; FIG. 1c shows a three-phase half-wave cyclo-converter.\n\nTaking the embodiment of FIG. 1a, in the conventional system, the switches 1u - 1w are respectively turn-on controlled as shown in FIG. 2. In the conventional turn-on control for the drive of an AC motor, a rotation of the magnetic field in the low speed and low frequency output region is in step state and the torque pulsation is high and a smooth rotation is difficult to attain.",
  "cpc": [
    "H02M 7/53875",
    "H02M 7/527"
  ],
  "ipc": [
    "G05D 3/00",
    "H02M 5/27",
    "H02M 7/48",
    "H02M 7/527",
    "H02P 27/06",
    "H02P 27/08",
    "H02P 8/18"
  ],
  "assignees": [
    "Mitsubishi Electric Corp"
  ],
  "inventors": [
    "Masahiko Akamatsu"
  ],
  "filing_date": "1974-12-11",
  "publication_date": "1977-01-11",
  "grant_date": "1977-01-11",
  "priority_date": "1973-12-28",
  "application_number": "US-53161174-A",
  "family_id": "11574207",
  "cited_by_count": 35,
  "citations": [
    "US2977518A",
    "US3585488A",
    "US3573601A",
    "US3614590A",
    "US3611086A",
    "US3649902A",
    "US3742330A"
  ]
}

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