Mram with aligned magnetic vectors

{
  "publication_number": "US5757695A",
  "country": "US",
  "kind": "A",
  "title": "Mram with aligned magnetic vectors",
  "abstract": "A multi-layer magnetic memory cell is provided, with magnetic vectors aligned along a length of the cell. To align the magnetic end vectors, an ellipsoidal shape is formed at the ends of the memory cell. Magnetic vectors aligned along the length prevent from forming high fields and magnetic poles at the discontinuity or ends of the layers. The memory cell with the ellipsoidal shape shows a constant magnetic resistance of the magnetic cell when a magnetic field is applied to the cell and attains a reduction of power consumption for the magnetic cell.",
  "claims": [
    "1. In a magnetic memory cell a layer of magnetic material having a width and a length being longer than the width of the layer, the magnetic memory cell comprising: smoothly curved ends to prevent the formation of high fields and magnetic poles at any discontinuities; and the width of the layers being less than a width of a magnetic domain wall within the layer of magnetic material so that the magnetic vectors cannot point along the width; wherein magnetic vectors in the layer point along the length of the layer of magnetic material.",
    "2. In a magnetic memory cell a layer of magnetic material as claimed in claim 1 wherein the length of the layer is at least twice as long as the width of the layer of magnetic material.",
    "3. In a magnetic memory cell a layer of magnetic material as claimed in claim 1 wherein the ends of the layer of magnetic material are elliptical.",
    "4. A multi-layer, magnetic memory cell comprising: a first layer of magnetic material having smoothly curved ends; a layer of nonmagnetic material positioned on the first layer of magnetic material; a second layer of magnetic material having smoothly curved ends positioned on the layer of nonmagnetic material so as to form a magnetic memory cell; and the magnetic memory cell having a width and a length with the width being less than a width of magnetic domain walls within the layers of magnetic material so as to restrict major magnetic vectors in the layers of magnetic material to point substantially along the length of the layers of magnetic material; wherein magnetic vectors in the layer point along the length of the layer of magnetic material.",
    "5. A multi-layer, magnetic memory cell as claimed in claim 4 wherein the width of the first and second layers are less than a width of a magnetic domain wall.",
    "6. A multi-layer, magnetic memory cell as claimed in claim 4 wherein the length of the first and second layers are at least twice as long as the width of the first and second layers of magnetic material.",
    "7. A multi-layer, magnetic memory cell as claimed in claim 4 wherein the ends of the first and second layers of magnetic material are elliptical."
  ],
  "description_excerpt": "The present invention pertains to a magnetic random access memory (MRAM) and more specifically to the MRAM cell having aligned magnetic vectors.\n\nOne type of magnetic memory cell uses multi-layer giant magnetoresistive materials (GMR) and utilizes submicron widths, in order to increase density. A conductive layer is disposed between the multi-layers of giant magnetoresistive material. In this structure the magnetization vectors are parallel to the length of the magnetic material instead of the width. In one embodiment the magnetization vector of one magnetic material layer is always maintained in one direction while the magnetization vector of the second magnetic layer switches between parallel and antiparallel to the first vector in order to represent both logical \"0\" and \"1\" states. In order to determine the logical state of a memory cell utilizing this material, the memory cell has a reference cell and an active cell. The reference cell always provides a voltage corresponding to one state (either always a \"1\" or always a \"0\"). The output of the reference cell is compared to the output of the active cell in order to determine the state of the memory cell. The requirement for an active and a reference cell reduces the density of a memory that utilizes such elements. Additionally, each memory cell requires transistors to switch the active and reference cells at appropriate times in order to read the cells. This further increases the cost of the memory.",
  "cpc": [
    "G11C 11/5607",
    "G11C 11/16",
    "G11C 11/1675",
    "G11C 2211/5616"
  ],
  "ipc": [
    "G11C 11/15",
    "G11C 11/16",
    "G11C 11/56",
    "H01L 21/8246",
    "H01L 27/105",
    "H10N 50/10"
  ],
  "assignees": [
    "Motorola Inc"
  ],
  "inventors": [
    "Jing Shi",
    "Theodore Zhu",
    "Saied N. Tehrani"
  ],
  "filing_date": "1997-02-05",
  "publication_date": "1998-05-26",
  "grant_date": "1998-05-26",
  "priority_date": "1997-02-05",
  "application_number": "US-79548897-A",
  "family_id": "25165646",
  "cited_by_count": 72,
  "citations": [
    "US3448438A",
    "US5343422A"
  ]
}