Chemical mechanical polishing pad with controlled wetting

{
  "publication_number": "US7530887B2",
  "country": "US",
  "kind": "B2",
  "title": "Chemical mechanical polishing pad with controlled wetting",
  "abstract": "Chemical mechanical polishing pads are provided, wherein the chemical mechanical polishing pads have a polishing layer comprising a polishing texture that exhibits a dimensionless roughness, R, is between 0.01 and 0.75. Also provided are methods of making the chemical mechanical polishing pads and for using them to polish substrates.",
  "claims": [
    "1. A chemical mechanical polishing pad for polishing a substrate selected from at least one of a magnetic substrate, an optical substrate and a semiconductor substrate; comprising: a polishing layer comprising a plurality of polishing elements forming a three-dimensional reticulated network having a polishing texture; wherein the polishing texture comprises a plurality of contact areas on a subset of the polishing elements; wherein the polishing texture has an average dimensionless roughness, R, defined by the following equation: R =(1 −C)/(1 +N) where C is a ratio of the average contact area of the plurality of contact areas to an average horizontal projected area for the subset of the polishing elements and N is a ratio of an average non-contact area for the subset of the polishing elements to the average horizontal projected area; wherein the average dimensionless roughness of the polishing texture is between 0.01 and 0.75; and, wherein the polishing texture is adapted for polishing the substrate.",
    "2. The chemical mechanical polishing pad of claim 1, wherein 90% of the subset of polishing elements having contact areas exhibit a contact area that is within ±10% of the average contact area.",
    "3. The chemical mechanical polishing pad of claim 1, wherein 90% of the subset of polishing elements having contact areas exhibit a pitch with an adjacent polishing element having a contact area that is within ±10% of the average pitch.",
    "4. The chemical mechanical polishing pad of claim 1, wherein 90% of the subset of polishing elements having contact areas exhibit a contact area that is within ±10% of the average contact area; and wherein 90% of the subset of polishing elements having contact areas exhibit a pitch with an adjacent polishing element having a contact area that is within ±10% of the average pitch.",
    "5. The chemical mechanical polishing pad of claim 1, wherein the average dimensionless roughness, R, of the polishing texture is between 0.03 and 0.50.",
    "6. The chemical mechanical polishing pad of claim 1, wherein the contact areas are selected from square cross-sections, rectangular cross-sections, rhomboid cross-sections, triangular cross-sections, circular cross-sections, ovoid cross-sections, hexagonal cross-sections, polygonal cross-sections, and irregular cross-sections.",
    "7. The chemical mechanical polishing pad of claim 1, wherein the reticulated network has a plurality of unit cells, wherein the plurality of unit cells have an average width and an average length, and wherein the average width of the unit cells is ≦ the average length of the unit cells.",
    "8. A method for polishing a substrate, comprising: providing a substrate selected from at least one of a magnetic substrate, an optical substrate and a semiconductor substrate; providing a chemical mechanical polishing pad having a polishing layer comprising a plurality of polishing elements forming a three-dimensional reticulated network having a polishing texture; wherein the polishing texture comprises a plurality of contact areas on the polishing elements; wherein the polishing texture has an average dimensionless roughness, R, defined by the following equation: R =(1 −C)/(1 +N) where C is a ratio of the average contact area of the plurality of contact areas to an average horizontal projected area for the subset of the polishing elements and N is a ratio of an average non-contact area for the subset of the polishing elements to the average horizontal projected area; creating dynamic contact at the interface between the chemical mechanical polishing pad and the substrate.",
    "9. The method of claim 8 further comprising: providing a polishing medium at an interface between the polishing texture and the substrate.",
    "10. The method of claim 9 wherein the polishing medium permeates less than 10% of the height of the polishing layer."
  ],
  "description_excerpt": "The present invention relates generally to the field of polishing pads for chemical mechanical polishing. In particular, the present invention is directed to a chemical mechanical polishing pad having a polishing structure useful for chemical mechanical polishing magnetic, optical and semiconductor substrates.\n\nIn the fabrication of integrated circuits and other electronic devices, multiple layers of conducting, semiconducting and dielectric materials are deposited onto and removed from a surface of a semiconductor wafer. Thin layers of conducting, semiconducting and dielectric materials may be deposited using a number of deposition techniques. Common deposition techniques in modern wafer processing include physical vapor deposition (PVD), also known as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD) and electrochemical plating, among others. Common removal techniques include wet and dry isotropic and anisotropic etching, among others.\n\nAs layers of materials are sequentially deposited and removed, the uppermost surface of the wafer becomes non-planar. Because subsequent semiconductor processing (e.g., metallization) requires the wafer to have a flat surface, the wafer needs to be planarized. Planarization is useful for removing undesired surface topography and surface defects, such as rough surfaces, agglomerated materials, crystal lattice damage, scratches and contaminated layers or materials.\n\nChemical mechanical planarization, or chemical mechanical polishing (CMP), is a common technique used to planarize or polish workpieces such as semiconductor wafers.",
  "cpc": [
    "B24B 37/26",
    "B24B 7/228",
    "H10P 52/00"
  ],
  "ipc": [
    "B24B 29/02",
    "B24B 7/04",
    "B24D 99/00",
    "H10P 95/00",
    "H10P 95/90",
    "B24D 11/00"
  ],
  "assignees": [
    "Rohm and Haas Electronic Materials CMP Holdings Inc"
  ],
  "inventors": [
    "Bo Jiang",
    "Gregory P. Muldowney",
    "Ravichandra V. Palaparthi"
  ],
  "filing_date": "2007-08-16",
  "publication_date": "2009-05-12",
  "grant_date": "2009-05-12",
  "priority_date": "2007-08-16",
  "application_number": "US-83987407-A",
  "family_id": "40032591",
  "cited_by_count": 18,
  "citations": [
    "US5578362A",
    "US6103376A",
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    "US6533645B2",
    "US6477926B1",
    "US6896593B2",
    "US20060052040A1",
    "US20070190909A1",
    "US20070190916A1"
  ]
}