Plasma processing method

{
  "publication_number": "US9018075B2",
  "country": "US",
  "kind": "B2",
  "title": "Plasma processing method",
  "abstract": "The present invention provides a plasma processing method in which sideetching and microloading can be suppressed in a plasma processing method of forming trenches with a mask having a minimum opening width of 20 nm or less. The plasma processing method of the present invention is characterized by including the steps of forming trenches by plasma etching, forming a nitride film on sidewalls of trenches using plasma, and forming an oxide film on sidewalls and bottom surfaces of the trenches using plasma.",
  "claims": [
    "1. A plasma processing method, for forming trenches by plasma-etching a silicon substrate with a mask having a minimum opening width of a trench pattern of 20 nm or less, comprising: a nitride-film forming step to form a nitride film; a first silicon-etching step to plasma-etch the silicon substrate using the mask, after the nitride-film forming step; an oxide-film forming step, to form an oxide film on bottom surfaces of the silicon substrate being plasma-etched to a given depth, using a plasma with RF power of 0 W supplied to a sample stage on which the silicon substrate is mounted, after the silicon substrate is plasma-etched to the given depth by repeating the nitride-film forming step and the first silicon-etching step; and a second silicon-etching step to plasma-etch the silicon substrate, after the oxide-film forming step.",
    "2. The plasma processing method of claim 1, wherein the silicon substrate is subjected to microloading when being plasma-etched to the given depth, and the given depth corresponds to a depth which yields an aspect ratio of 10 or higher.",
    "3. The plasma processing method of claim 2, wherein each of the nitride-film forming step and the oxide-film forming step uses a plasma, the plasma of the nitride-film forming step is a plasma using N 2 gas, and wherein the plasma of the oxide-film forming step is a plasma using O 2 gas.",
    "4. The plasma processing method of claim 2, wherein plasma of the first silicon-etching step and plasma of the second silicon-etching step are plasmas using a mixture gas of Cl 2 gas and O 2 gas.",
    "5. The plasma processing method of claim 1, wherein in the nitride-film forming step the nitride film is formed on exposed side surfaces and on bottom surfaces of the silicon substrate.",
    "6. The plasma processing method of claim 1, wherein prior to the nitride-film forming step the silicon substrate is etched using the mask, so as to expose a bottom surface and side surfaces of the silicon substrate, and wherein in the nitride-film forming step the nitride film is formed on exposed side surfaces and on bottom surfaces of the silicon substrate.",
    "7. The plasma processing method of claim 1, wherein in the oxide-film forming step the oxide film is formed on the bottom surfaces and exposed side surfaces of the silicon substrate.",
    "8. A plasma processing method, for forming trenches by plasma-etching a silicon substrate with a mask having a minimum opening width of a trench pattern of 20 nm or less, comprising: a nitride-film forming step to form a nitride film; a first silicon-etching step to plasma-etch the silicon substrate using the mask; an oxide-film forming step, to form an oxide film on bottom surfaces of the silicon substrate being plasma-etched to a given depth, using a plasma with RF power of 0 W supplied to a sample stage on which the silicon substrate is mounted, after the silicon substrate is plasma-etched to the given depth by repeating the nitride-film forming step and the first silicon-etching step; and a second silicon-etching step to plasma-etch the silicon substrate, after the oxide-film forming step.",
    "9. The plasma processing method of claim 8, wherein the silicon substrate is subjected to microloading when being plasma-etched to the given depth, and the given depth corresponds to a depth which yields an aspect ratio of 10 or higher.",
    "10. The plasma processing method of claim 9, wherein each of the nitride-film forming step and the oxide-film forming step uses a plasma, the plasma of the nitride-film forming step is a plasma using N 2 gas, and wherein the plasma of the oxide-film forming step is a plasma using O 2 gas.",
    "11. The plasma processing method of claim 9, wherein plasma of the first silicon-etching step and plasma of the second silicon-etching step are plasmas using a mixture gas of Cl 2 gas and O 2 gas.",
    "12. The plasma processing method of claim 8, wherein in the nitride-film forming step the nitride film is formed on exposed side surfaces and on bottom surfaces of the silicon substrate.",
    "13. The plasma processing method of claim 8, wherein prior to the nitride-film forming step the silicon substrate is etched using the mask, so as to expose a bottom surface and side surfaces of the silicon substrate, and wherein in the nitride-film forming step the nitride film is formed on exposed side surfaces and on bottom surfaces of the silicon substrate.",
    "14. The plasma processing method of claim 8, wherein in the oxide-film forming step the oxide film is formed on the bottom surfaces and exposed side surfaces of the silicon substrate.",
    "15. The plasma processing method of claim 1, wherein the mask is different from the nitride film formed in the nitride-film forming step.",
    "16. The plasma processing method of claim 1, wherein the mask is different from the nitride film formed in the nitride-film forming step.",
    "17. A plasma processing method, for forming trenches by plasma-etching a silicon substrate with a mask having a minimum opening width of a trench pattern of 20 nm or less, comprising: a nitride-film forming step to form a nitride film; a first silicon-etching step to plasma-etch the silicon substrate using the mask, after the nitride-film forming step; an oxide-film forming step to form an oxide film on bottom surfaces of the silicon substrate being plasma-etched to a given depth and being subjected to microloading, after the silicon substrate is plasma-etched to the given depth by repeating the nitride-film forming step and the first silicon-etching step; and a second silicon-etching step to plasma-etch the silicon substrate, after the oxide-film forming step.",
    "18. The plasma processing method of claim 17, wherein the mask is different from the nitride film formed in the nitride-film forming step."
  ],
  "description_excerpt": "The present invention relates to a method for manufacturing semiconductor devices and, more particularly, to a plasma processing method in which plasma etching is conducted.\n\nIn recent years, along with higher integration of semiconductor devices, shallow-trench isolation (hereinafter abbreviated STI) techniques have been used as a device isolation method.\n\nIn an STI technique, a silicon substrate is first plasma-etched, for example, using a silicon nitride film as a mask to form trenches for device isolation. The formed trenches are then filled with a silicon oxide film and unwanted portions of the silicon oxide film are removed by chemical mechanical polishing (CMP) so that STI regions are formed.\n\nJP-A-2003-007679 discloses a method for performing etching by plasma etching using gases including at least Cl 2 and HBr as a method for forming trenches for device isolation.\n\nFurthermore, along with higher integration of semiconductor devices of recent years, higher miniaturization has been required; in STI techniques for the next-generation semiconductor devices, trenches having a depth of about 300 nm are required to be formed using a mask having an opening width of 20 nm or less.\n\nHowever, when an attempt is made to form trenches having such a high aspect ratio by plasma etching using gases including at least Cl 2 and HBr as disclosed in JPA-2003-007679, sideetching on the sidewalls of the trenches takes place in regions where the opening widths of the mask are small as shown in FIG. 3; furthermore, microloading occurs.",
  "cpc": [
    "A01G 17/10",
    "A01G 17/085",
    "A01G 9/128",
    "F16B 7/0406",
    "H01L 21/76229",
    "H10P 50/242",
    "H10P 50/244",
    "H10W 10/0143",
    "H10W 10/17"
  ],
  "ipc": [
    "H01L 21/762"
  ],
  "assignees": [
    "Hitachi High Technologies Corp"
  ],
  "inventors": [
    "Toru Ito",
    "Hiroaki Ishimura",
    "Akito Kouchi",
    "Hayato Watanabe"
  ],
  "filing_date": "2012-02-24",
  "publication_date": "2015-04-28",
  "grant_date": "2015-04-28",
  "priority_date": "2011-12-21",
  "application_number": "US-201213404162-A",
  "family_id": "48654960",
  "cited_by_count": 1,
  "citations": [
    "US20020185469A1",
    "JP2003007679A",
    "US20090275202A1",
    "KR20090003716A",
    "US20090065479A1",
    "KR100927691B1",
    "WO2011115761A2"
  ]
}