Apparatus for controlling clock signals to be supplied to a plurality of processing modules and control method thereof

{
  "publication_number": "US9606610B2",
  "country": "US",
  "kind": "B2",
  "title": "Apparatus for controlling clock signals to be supplied to a plurality of processing modules and control method thereof",
  "abstract": "An information processing apparatus includes a plurality of processing units each configured to execute predetermined processing on input data in parallel and calculate an evaluation value based on the executed processing, an estimation unit configured to perform estimation of a processing time required for each of the plurality of the processing units to perform the predetermined processing based on the evaluation values calculated by the relevant processing unit and at least one other processing unit of the plurality of the processing units, and a clock control unit configured to, with respect to each of the processing units, determine a frequency of a clock signal to be supplied to the relevant processing unit in response to the estimated processing time of the relevant processing unit and supply the clock signal having the determined frequency.",
  "claims": [
    "1. An information processing apparatus comprising: a plurality of processing units configured to execute predetermined processing in parallel on respective input data which are spatially or temporally near to each other, and output respective intermediate results of the executed processing; an estimation unit configured to estimate a processing time required for each one of the plurality of processing units to complete the predetermined processing based on intermediate results output from the each one of the plurality of processing units and at least one other processing unit from the plurality of the processing units, respectively; and a clock control unit configured to, with respect to each one of the plurality of processing units, determine a frequency of a clock signal to be supplied to the each one of the plurality of processing units in accordance with the estimated processing time for the each one of the plurality of processing units and supply the clock signal having the determined frequency to the each one of the plurality of processing units.",
    "2. The information processing apparatus according to claim 1, wherein the at least one other processing unit is configured to process input data spatially or temporally adjacent to input data to a processing unit of interest.",
    "3. The information processing apparatus according to claim 1, further comprising a clock generation unit configured to generate a plurality of clock signals having different frequencies, wherein the clock control unit selects one clock signal from the plurality of clock signals generated by the clock generation unit and supplies the selected clock signal based on the estimated processing time.",
    "4. The information processing apparatus according to claim 1, wherein the estimation unit estimates the processing time required for each one of the plurality of processing units based on the newly calculated intermediate results output from the each one of the plurality of processing units and intermediate results previously calculated by the each one of the plurality of processing units and at least one other processing unit.",
    "5. The information processing apparatus according to claim 1, wherein an intermediate result calculated by the estimation unit varies according to input data.",
    "6. The information processing apparatus according to claim 1, further comprising a voltage control unit configured to control a value of a power source voltage to be supplied to the each one of the plurality of processing units in accordance with the frequency of the clock signal supplied to the each one of the plurality of processing units.",
    "7. The information processing apparatus according to claim 1, wherein the predetermined processing is a series of sub-processings, and the intermediate result is a result of a sub-processing in the series of sub-processings.",
    "8. The information processing apparatus according to claim 1, wherein the predetermined processing is processing for detecting a specific pattern.",
    "9. The information processing apparatus according to claim 1, wherein the estimation unit estimates the processing time of the each one of the plurality of the processing units based on combinations of a plurality of the evaluation values.",
    "10. A method for controlling an information processing apparatus, the method comprising: causing a plurality of processing units to execute predetermined processing in parallel on respective input data which are spatially or temporally near to each other and output respective intermediate results of the executed processing; estimating a processing time required for each one of the plurality of the processing units to complete the predetermined processing based on intermediate results output from the each one of the plurality of processing units and at least one other processing unit from the plurality of the processing units, respectively; and determining a frequency of a clock signal to be supplied to the each one of the processing units in accordance with the estimated processing time for the each one of the plurality of processing units and supplying the clock signal having the determined frequency to the each one of the plurality processing units.",
    "11. A non-transitory computer-readable storage medium storing a computer program for causing a computer to execute a method for controlling an information processing apparatus, the method comprising: causing a plurality of processing units to execute predetermined processing in parallel on respective input data which are spatially or temporally near to each other and output respective intermediate results of the executed processing; estimating a processing time required for each one of the plurality of the processing units to complete the predetermined processing based on intermediate results output from the each one of the plurality of processing units and at least one other processing unit from the plurality of the processing units, respectively; and determining a frequency of a clock signal to be supplied to the each one of the processing units in accordance with the estimated processing time for the each one of the plurality of processing units and supplying the clock signal having the determined frequency to the each one of the plurality processing units."
  ],
  "description_excerpt": "Field of the Invention\n\nThe present invention relates to an apparatus for controlling clock signals to be supplied to a plurality of processing modules and a control method thereof.\n\nDescription of the Related Art\n\nA technique for controlling a frequency of a clock signal and a power source voltage value to be supplied to a processing module is discussed for optimizing a processing time and reducing power consumption in a system including a plurality of processing modules capable of performing processing in parallel. For example, Japanese Patent Application Laid-Open No. 2002-215599 discusses a multiprocessor system in which a processor A and a processor B respectively execute a program A and a program B in parallel and synchronize with each other after the processing. In this system, for example, the processor A changes a frequency of an input clock signal according to a ratio between a processing time estimated value Ta of the program A and a processing time estimated value Tb of the program B and changes a power source voltage to be supplied according to the frequency of the clock signal. Accordingly, power consumption of the processor A is reduced.\n\nThe above-described technique controls a frequency of a clock signal and a power source voltage to be supplied in next processing according to a previously estimated ratio of processing time estimated values or a previous processing time of each processor.",
  "cpc": [
    "G06F 1/324",
    "G06F 1/3243",
    "G06F 1/3296",
    "G06F 18/2148",
    "G06K 9/00228",
    "G06K 9/00986",
    "G06K 9/00993",
    "G06K 9/6257",
    "G06V 10/7747",
    "G06V 10/955",
    "G06V 10/96",
    "G06V 40/161",
    "Y02B 60/1217",
    "Y02B 60/1239",
    "Y02B 60/1285",
    "Y02D 10/00"
  ],
  "ipc": [
    "G06F 1/06",
    "G06F 1/10",
    "G06F 1/28",
    "G06F 1/00",
    "G06F 1/04",
    "G06F 1/32",
    "G06F 15/00",
    "G06K 9/00",
    "G06K 9/62"
  ],
  "assignees": [
    "Canon Inc"
  ],
  "inventors": [
    "Osamu Nomura"
  ],
  "filing_date": "2015-01-20",
  "publication_date": "2017-03-28",
  "grant_date": "2017-03-28",
  "priority_date": "2014-01-20",
  "application_number": "US-201514600277-A",
  "family_id": "53544724",
  "cited_by_count": 1,
  "citations": [
    "JP2002215599A",
    "US6928566B2",
    "US8754896B2",
    "US8972769B2",
    "US8819396B2"
  ]
}