Patent · US5336638A · A · US
Process for manufacturing semiconductor devices
- (11) Publication number
- US5336638A
- (21) Application number
- 07/846,828
- (22) Filing date
- 1992-03-06
- (30) Priority date
- 1991-03-06
- (43) Publication date
- 1994-08-09
- (45) Date of grant
- 1994-08-09
- (51) IPC
- H01L 21/02; H10B 12/00
- (52) CPC
- (73) Assignee
- Hitachi Ltd
- (72) Inventors
- Masayuki Suzuki; Ryo Haruta; Hiroshi Shinriki; Masayuki Nakata
- (54) Title
- Process for manufacturing semiconductor devices
- (57) Abstract
Herein disclosed is a process for manufacturing a semiconductor device, which comprises: a step of forming a first electrode composed of tantalum and tungsten over a semiconductor substrate; a step of depositing a dielectric film of tantalum oxide on the first electrode; a step of oxidizing the first electrode and the dielectric film of tantalum oxide; and a step of forming a second electrode over the dielectric film.
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Claims (29)
- A process for manufacturing a semiconductor device, comprising: (a) a step of forming a first electrode comprised of a first film of a mixture of first and second metals over a semiconductor substrate; (b) a step of depositing a dielectric film made of an oxide film of said first metal on said first electrode; (c) a step of oxidizing said first electrode and said dielectric film in an oxidizing atmosphere such that said first metal is oxidized and said second metal is not oxidized; and (d) a step of forming a second electrode over said dielectric film.
- A process for manufacturing a semiconductor device according to claim 1, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.
- A process for manufacturing a semiconductor device according to claim 2, wherein said oxidation is performed in an atmosphere containing H 2 O and H 2.
- A process for manufacturing a semiconductor device according to claim 3, wherein said first metal is Ta whereas said second metal is W.
- A process for manufacturing a semiconductor device according to claim 4, wherein the content of said first metal is 50 atom %.
- A process for manufacturing a semiconductor device according to claim 3, wherein said first metal is Ta whereas said second metal is Mo.
- A process for manufacturing a semiconductor device, comprising: (a) a step of forming a first electrode comprised of a first film of a mixture of first and second metals over a semiconductor substrate; (b) a step of forming a dielectric film of an oxide film of said first metal by oxidizing said first electrode in such an atmosphere, containing H 2 O and H 2, such that said first metal is oxidized and said second metal is not oxidized; and (c) a step of forming a second electrode over said dielectric film.
- A process for manufacturing a semiconductor device according to claim 7, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.
- A process for manufacturing a semiconductor device according to claim, 8 wherein said first metal is Ta whereas said second metal is W.
- A process for manufacturing a semiconductor device according to claim 8, wherein said first metal is Ta whereas said second metal is Mo.
- A process for manufacturing a semiconductor device, comprising: (a) a step of forming a MISFET having a source, a drain and a gate electrode over the surface of a semiconductor substrate; (b) a step of forming a first electrode connected electrically with one of the source and drain of said MISFET and including a first film of a mixture of a first metal and a second metal; (c) a step of depositing a dielectric film formed of an oxide film of said first metal over said first electrode; (d) a step of oxidizing said first electrode and said dielectric film in an atmosphere such that said first metal is oxidized and said second metal is not oxidized; and (e) a step of forming a second electrode over said dielectric film.
- A process for manufacturing a semiconductor device according to claim 11, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.
- A process for manufacturing a semiconductor device according to claim 12, wherein the oxidation is performed in an atmosphere containing H 2 O and H 2.
- A process for manufacturing a semiconductor device according to claim 13, wherein said first metal is Ta whereas said second metal is W.
- A process for manufacturing a semiconductor device according to claim 14, wherein the content of said first metal is 50 atom %.
- A process for manufacturing a semiconductor device according to claim 13, wherein said first metal is Ta whereas said second metal is Mo.
- A process for manufacturing a semiconductor device according to claim 13, further comprising a step of forming an underlying film of silicon between said first electrode and one of said source and said drain.
- A process for manufacturing a semiconductor device according to claim 17, further comprising a step of forming a barrier layer of an oxidation resisting conductive film between said underlaying film and said first electrode.
- A process for manufacturing a semiconductor device according to claim 18, wherein said barrier layer is made of any selected from the group consisting of TiN, a Ti-W alloy, TiSi 2, NiSi and CoSi 2.
- A process for manufacturing a semiconductor device according to claim 1, wherein the first and second metals respectively are metals that can be oxidized under different oxidizing conditions.
- A process for manufacturing a semiconductor device according to claim 1, comprising the further step of forming a polycrystalline silicon film between the semiconductor substrate and said first film, said first electrode including said polycrystalline silicon film.
- A process for manufacturing a semiconductor device according to claim 21, further comprising the step of forming a barrier layer between the polycrystalline silicon film and the first film, so as to reduce oxidation of the polycrystalline silicon film.
- A process for manufacturing a semiconductor device according to claim 21, including the further step of forming a refractory metal silicide film on the polycrystalline silicon film.
- A process for manufacturing a semiconductor device according to claim 23, wherein the further step of forming a refractory metal silicide film includes sub-steps of forming a refractory metal film on the polycrystalline silicon film and silicifying the refractory metal film to form the refractory metal silicide film, whereby the refractory metal silicide film is formed in self-alignment with the polycrystalline silicon film.
- A process for manufacturing a semiconductor device according to claim 24, wherein the refractory metal film is made of a metal selected from the group consisting of titanium, nickel and cobalt.
- A process for manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate has a groove therein, an inner surface of the semiconductor substrate forming surfaces of the groove, and the first electrode comprised of the first film is formed over said inner surface.
- A process for manufacturing a semiconductor device according to claim 11, wherein said first electrode is formed to overlap said gate electrode.
- A process for manufacturing a semiconductor device according to claim 7, wherein said semiconductor substrate has a groove therein, an inner surface of the semiconductor substrate forming surfaces of the groove, and the first electrode is formed overlying said inner surface.
- A process for manufacturing a semiconductor device according to claim 11, wherein said first electrode, dielectric film and second electrode form a capacitor element of the semiconductor device.
Description
The present invention relates to a semiconductor device and, more particularly, to a technology which is effective if applied to a semiconductor device having a capacitor element.
In a semiconductor device, especially a semiconductor device including a memory cell of DRAM (Dynamic Random Access Memory) having a selecting MISFET and a capacitor element connected in series, the size of the memory cell has been reduced to improve the degree of integration. Accordingly, the size of the capacitor element is also reduced. In order to keep a reliability to soft errors due to alpha rays, however, the amount of charge to be stored by the capacitor element cannot be decreased less than a predetermined value. Thus, a capacitor element of stacked structure is used to reduce the size of the memory cell and to improve the reliability to the soft errors.
The capacitor element is composed of a lower electrode and an upper electrode formed over the lower electrode through a charge storing insulating film. The lower electrode is formed of a polycrystalline silicon film. The lower electrode is connected with the source or drain region of the selecting MISFET. The charge storing insulating film is formed of a silicon oxide film which is prepared by thermally oxidizing the polycrystalline silicon film forming the lower electrode. Alternatively, the charge storing insulating film is formed of a laminated film which is composed of a silicon nitride film formed over the polycrystalline silicon film and a silicon oxide film formed over the silicon nitride film by thermally oxidizing the silicon nitride film.
Citations (14)
- JPS5629340A
- US4495219A
- US5035957A
- US4437139A
- JPS61101069A
- US5079191A
- US4891684A
- JPS63312664A
- US4962414A
- JPH02151060A
- US5070379A
- US4999155A
- US5126283A
- US5142438A
Record as JSON
{
"publication_number": "US5336638A",
"country": "US",
"kind": "A",
"title": "Process for manufacturing semiconductor devices",
"abstract": "Herein disclosed is a process for manufacturing a semiconductor device, which comprises: a step of forming a first electrode composed of tantalum and tungsten over a semiconductor substrate; a step of depositing a dielectric film of tantalum oxide on the first electrode; a step of oxidizing the first electrode and the dielectric film of tantalum oxide; and a step of forming a second electrode over the dielectric film.",
"claims": [
"1. A process for manufacturing a semiconductor device, comprising: (a) a step of forming a first electrode comprised of a first film of a mixture of first and second metals over a semiconductor substrate; (b) a step of depositing a dielectric film made of an oxide film of said first metal on said first electrode; (c) a step of oxidizing said first electrode and said dielectric film in an oxidizing atmosphere such that said first metal is oxidized and said second metal is not oxidized; and (d) a step of forming a second electrode over said dielectric film.",
"2. A process for manufacturing a semiconductor device according to claim 1, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.",
"3. A process for manufacturing a semiconductor device according to claim 2, wherein said oxidation is performed in an atmosphere containing H 2 O and H 2.",
"4. A process for manufacturing a semiconductor device according to claim 3, wherein said first metal is Ta whereas said second metal is W.",
"5. A process for manufacturing a semiconductor device according to claim 4, wherein the content of said first metal is 50 atom %.",
"6. A process for manufacturing a semiconductor device according to claim 3, wherein said first metal is Ta whereas said second metal is Mo.",
"7. A process for manufacturing a semiconductor device, comprising: (a) a step of forming a first electrode comprised of a first film of a mixture of first and second metals over a semiconductor substrate; (b) a step of forming a dielectric film of an oxide film of said first metal by oxidizing said first electrode in such an atmosphere, containing H 2 O and H 2, such that said first metal is oxidized and said second metal is not oxidized; and (c) a step of forming a second electrode over said dielectric film.",
"8. A process for manufacturing a semiconductor device according to claim 7, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.",
"9. A process for manufacturing a semiconductor device according to claim, 8 wherein said first metal is Ta whereas said second metal is W.",
"10. A process for manufacturing a semiconductor device according to claim 8, wherein said first metal is Ta whereas said second metal is Mo.",
"11. A process for manufacturing a semiconductor device, comprising: (a) a step of forming a MISFET having a source, a drain and a gate electrode over the surface of a semiconductor substrate; (b) a step of forming a first electrode connected electrically with one of the source and drain of said MISFET and including a first film of a mixture of a first metal and a second metal; (c) a step of depositing a dielectric film formed of an oxide film of said first metal over said first electrode; (d) a step of oxidizing said first electrode and said dielectric film in an atmosphere such that said first metal is oxidized and said second metal is not oxidized; and (e) a step of forming a second electrode over said dielectric film.",
"12. A process for manufacturing a semiconductor device according to claim 11, wherein said first metal is an element belonging to the IVb or Vb group whereas said second metal is at least one metal selected from the group consisting of Mo and W.",
"13. A process for manufacturing a semiconductor device according to claim 12, wherein the oxidation is performed in an atmosphere containing H 2 O and H 2.",
"14. A process for manufacturing a semiconductor device according to claim 13, wherein said first metal is Ta whereas said second metal is W.",
"15. A process for manufacturing a semiconductor device according to claim 14, wherein the content of said first metal is 50 atom %.",
"16. A process for manufacturing a semiconductor device according to claim 13, wherein said first metal is Ta whereas said second metal is Mo.",
"17. A process for manufacturing a semiconductor device according to claim 13, further comprising a step of forming an underlying film of silicon between said first electrode and one of said source and said drain.",
"18. A process for manufacturing a semiconductor device according to claim 17, further comprising a step of forming a barrier layer of an oxidation resisting conductive film between said underlaying film and said first electrode.",
"19. A process for manufacturing a semiconductor device according to claim 18, wherein said barrier layer is made of any selected from the group consisting of TiN, a Ti-W alloy, TiSi 2, NiSi and CoSi 2.",
"20. A process for manufacturing a semiconductor device according to claim 1, wherein the first and second metals respectively are metals that can be oxidized under different oxidizing conditions.",
"21. A process for manufacturing a semiconductor device according to claim 1, comprising the further step of forming a polycrystalline silicon film between the semiconductor substrate and said first film, said first electrode including said polycrystalline silicon film.",
"22. A process for manufacturing a semiconductor device according to claim 21, further comprising the step of forming a barrier layer between the polycrystalline silicon film and the first film, so as to reduce oxidation of the polycrystalline silicon film.",
"23. A process for manufacturing a semiconductor device according to claim 21, including the further step of forming a refractory metal silicide film on the polycrystalline silicon film.",
"24. A process for manufacturing a semiconductor device according to claim 23, wherein the further step of forming a refractory metal silicide film includes sub-steps of forming a refractory metal film on the polycrystalline silicon film and silicifying the refractory metal film to form the refractory metal silicide film, whereby the refractory metal silicide film is formed in self-alignment with the polycrystalline silicon film.",
"25. A process for manufacturing a semiconductor device according to claim 24, wherein the refractory metal film is made of a metal selected from the group consisting of titanium, nickel and cobalt.",
"26. A process for manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate has a groove therein, an inner surface of the semiconductor substrate forming surfaces of the groove, and the first electrode comprised of the first film is formed over said inner surface.",
"27. A process for manufacturing a semiconductor device according to claim 11, wherein said first electrode is formed to overlap said gate electrode.",
"28. A process for manufacturing a semiconductor device according to claim 7, wherein said semiconductor substrate has a groove therein, an inner surface of the semiconductor substrate forming surfaces of the groove, and the first electrode is formed overlying said inner surface.",
"29. A process for manufacturing a semiconductor device according to claim 11, wherein said first electrode, dielectric film and second electrode form a capacitor element of the semiconductor device."
],
"description_excerpt": "The present invention relates to a semiconductor device and, more particularly, to a technology which is effective if applied to a semiconductor device having a capacitor element.\n\nIn a semiconductor device, especially a semiconductor device including a memory cell of DRAM (Dynamic Random Access Memory) having a selecting MISFET and a capacitor element connected in series, the size of the memory cell has been reduced to improve the degree of integration. Accordingly, the size of the capacitor element is also reduced. In order to keep a reliability to soft errors due to alpha rays, however, the amount of charge to be stored by the capacitor element cannot be decreased less than a predetermined value. Thus, a capacitor element of stacked structure is used to reduce the size of the memory cell and to improve the reliability to the soft errors.\n\nThe capacitor element is composed of a lower electrode and an upper electrode formed over the lower electrode through a charge storing insulating film. The lower electrode is formed of a polycrystalline silicon film. The lower electrode is connected with the source or drain region of the selecting MISFET. The charge storing insulating film is formed of a silicon oxide film which is prepared by thermally oxidizing the polycrystalline silicon film forming the lower electrode. Alternatively, the charge storing insulating film is formed of a laminated film which is composed of a silicon nitride film formed over the polycrystalline silicon film and a silicon oxide film formed over the silicon nitride film by thermally oxidizing the silicon nitride film.",
"cpc": [
"H10B 12/03",
"H10D 1/68",
"H10D 84/0144",
"Y10S 148/117"
],
"ipc": [
"H01L 21/02",
"H10B 12/00"
],
"assignees": [
"Hitachi Ltd"
],
"inventors": [
"Masayuki Suzuki",
"Ryo Haruta",
"Hiroshi Shinriki",
"Masayuki Nakata"
],
"filing_date": "1992-03-06",
"publication_date": "1994-08-09",
"grant_date": "1994-08-09",
"priority_date": "1991-03-06",
"application_number": "US-84682892-A",
"family_id": "26378125",
"cited_by_count": 129,
"citations": [
"JPS5629340A",
"US4495219A",
"US5035957A",
"US4437139A",
"JPS61101069A",
"US5079191A",
"US4891684A",
"JPS63312664A",
"US4962414A",
"JPH02151060A",
"US5070379A",
"US4999155A",
"US5126283A",
"US5142438A"
]
}
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