Mounting structure for semiconductor device having entirely flat leads

{
  "publication_number": "US6717256B1",
  "country": "US",
  "kind": "B1",
  "title": "Mounting structure for semiconductor device having entirely flat leads",
  "abstract": "The semiconductor device (A) comprises a semiconductor chip (3), a protective package (4) covering the semiconductor chip (3), a first lead (1), and a second lead (2). The semiconductor chip (3) is placed at an inner end (10 a) of the first lead (1). Further, the semiconductor chip (3) is connected to an inner end (20 a) of the second lead (2) via a wire (W). The first lead (1) includes an outer portion (11) extending out of the protective package (4) whereas the second lead (2) includes an outer portion (21) extending out of the protective package (4). These two outer portions (11, 21) are flat.",
  "claims": [
    "1. A mounting structure of a semiconductor device on a circuit substrate, the semiconductor device including: a semiconductor chip; a protective package for covering the semiconductor chip, including at least a pair of opposed side surfaces, each of the side surfaces having a first slanted portion and a second slanted portion each being flat and meeting the other at a predetermined angle; a first lead conducting to the semiconductor chip, including an inner portion covered by the protective package and a plurality of outer portions extending out of the protective package; a second lead conducting to the semiconductor chip, including an inner portion covered by the protective package and a plurality of outer portions extending out of the protective package; the inner portions and the outer portions of the first and the second leads being flat and extending in a same plane; the outer portions of the first lead extending from both of the pair of opposed side surfaces out of the protective package; the outer portions of the second lead extending from both of the opposed side surfaces out of the protective package; the circuit substrate including: a first surface formed with a predetermined wiring pattern; a second surface opposite to and spaced from the first surface thickness wise of the circuit substrate; a plurality of connecting pads formed in the first surface; and a through hole corresponding to a shape of the protective package; wherein the protective package is fitted into the through hole of the substrate while partially protecting beyond both of the first and second surfaces of the substrate thickness wise thereof, the outer portions of the first lead and the second lead being connected with the connecting pads.",
    "2. The mounting structure according to claim 1, wherein the connecting pads are disposed around the through hole.",
    "3. The mounting structure according to claim 1, wherein the first surface mounted with the semiconductor device is laminated with a coating member."
  ],
  "description_excerpt": "The present invention relates to a semiconductor device, and more specifically to a semiconductor device having a light emitting capability and/or a light receiving capability. Further, the present invention relates to a circuit substrate for supporting such a semiconductor device as the above. Still further, the present invention relates to a combination of the semiconductor device and a storage receptacle for collectively holding a plurality of the semiconductor devices.\n\nFIG. 20 and FIG. 21 show a prior art semiconductor device. This semiconductor device X is a light emitting diode (LED), and includes a first lead 100, a second lead 200, a semiconductor chip 300 as a light emitting element, a connecting wire W, and a protective package 400.\n\nThe semiconductor chip 300 is placed at an inner end 100 a of the first lead 100. The semiconductor chip 300 has an upper surface 330 electrically connected with an inner end 200 a of the second lead 200 via a wire W. The protective package 400 is made of a transparent resin such as an epoxy resin, and completely covers the semiconductor chip 300 and the connecting wire W. Further, the protective package 400 partially covers the first and the second leads 100, 200. In FIGS. 20 and 21, the inner portion of the first lead 100 covered by the protective package 400 is indicated by numeral code 110 whereas the outer portion of the first lead 100 extending out of the protective package 400 is indicated by numeral code 111.",
  "cpc": [
    "H10H 20/857",
    "H01S 5/02216",
    "H01S 5/02253",
    "H01S 5/0231",
    "H01S 5/0232",
    "H01S 5/183",
    "H10H 20/853",
    "H10W 72/0198",
    "H10W 72/07141",
    "H10W 72/073",
    "H10W 72/075",
    "H10W 72/07521",
    "H10W 72/536",
    "H10W 72/5363",
    "H10W 72/884",
    "H10W 74/00",
    "H10W 74/10",
    "H10W 90/736",
    "H10W 90/756"
  ],
  "ipc": [
    "H01L 33/44",
    "H01L 33/56",
    "H01L 33/62",
    "H01S 5/0232",
    "H10W 74/00"
  ],
  "assignees": [
    "Rohm Co Ltd"
  ],
  "inventors": [
    "Shinichi Suzuki",
    "Nobuaki Suzuki",
    "Masashi Sano"
  ],
  "filing_date": "1999-08-26",
  "publication_date": "2004-04-06",
  "grant_date": "2004-04-06",
  "priority_date": "1998-08-31",
  "application_number": "US-76357301-A",
  "family_id": "17142339",
  "cited_by_count": 27,
  "citations": [
    "JPS4893284A",
    "JPS59195757A",
    "JPS62131441A",
    "JPS63168931A",
    "JPS63173721A",
    "JPH01120875A",
    "US5198888A",
    "JPH02101559A",
    "JPH045652A",
    "JPH05319403A",
    "JPH06296045A",
    "US5495125A",
    "JPH0832106A"
  ]
}