Formation of solder and copper interconnect structures and associated techniques and configurations

{
  "publication_number": "US9508667B2",
  "country": "US",
  "kind": "B2",
  "title": "Formation of solder and copper interconnect structures and associated techniques and configurations",
  "abstract": "Embodiments of the present disclosure are directed toward formation of solder and copper interconnect structures and associated techniques and configurations. In one embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a solderable material on the IC substrate using an ink deposition process, a binder printing system, or a powder laser sintering system. In another embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure. Other embodiments may be described and/or claimed.",
  "claims": [
    "1. A method comprising: providing an integrated circuit (IC) substrate; depositing a solderable ink on the IC substrate using an ink deposition process, wherein the solderable ink includes a solder powder mixed with a no residue flux (NRF) material that includes a base polymer of polyarylene carbonate (PAC) material and a formic acid fluxing agent; and reflowing the deposited solderable ink to form one or more solder bumps on the IC substrate, wherein a first solder bump of the one or more solder bumps has a size that is different than a size of a second solder bump of the one or more solder bumps.",
    "2. The method of claim 1, wherein the solderable ink includes a solder powder mixed with a stabilizing binder that is stable at room temperature and configured to decompose at an elevated temperature above the room temperature.",
    "3. The method of claim 1, wherein: the IC substrate includes a contact; providing the IC substrate comprises providing a die, wafer, or package substrate; and depositing the solderable ink comprises depositing a solderable material on the contact using an ink jet printer according to a computer-aided design (CAD) file.",
    "4. The method of claim 1, wherein: the IC substrate includes a contact; providing the IC substrate comprises providing a die, wafer, or package substrate; and depositing the solderable ink comprises depositing a solderable material on the contact using an aerosol jet printing system according to a computer-aided design (CAD) file."
  ],
  "cpc": [
    "H10W 90/701",
    "H01L 21/768",
    "H01L 2224/11318",
    "H01L 2224/1132",
    "H01L 2224/11332",
    "H01L 2224/11505",
    "H01L 2224/11849",
    "H01L 2224/13147",
    "H01L 23/53228",
    "H01L 24/11",
    "H01L 2924/14",
    "H10P 14/46",
    "H10W 20/01",
    "H10W 20/063",
    "H10W 20/4421",
    "H10W 20/4473",
    "H10W 70/098",
    "H10W 72/01223",
    "H10W 72/01225",
    "H10W 72/01236",
    "H10W 72/01257",
    "H10W 72/01261",
    "H10W 72/0198",
    "H10W 72/072",
    "H10W 72/073",
    "H10W 72/252",
    "H10W 72/29",
    "H10W 74/15",
    "H10W 90/724",
    "H10W 90/734",
    "H10W 90/754"
  ],
  "assignees": [
    "INTEL CORP"
  ],
  "filing_date": "2014-12-23",
  "publication_date": "2016-11-29",
  "grant_date": "2016-11-29",
  "priority_date": "2014-12-23",
  "application_number": "US-201414581825-A",
  "family_id": "56130334",
  "citations": [
    "US2006163744A1",
    "US2007062723A1",
    "US2012309866A1",
    "US2014035995A1",
    "US6724912B1",
    "US7564130B1"
  ]
}