Doped semiconductor films and processing

{
  "publication_number": "US9099423B2",
  "country": "US",
  "kind": "B2",
  "title": "Doped semiconductor films and processing",
  "abstract": "A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration.",
  "claims": [
    "1. A method of incorporating an electrical dopant in a semiconductor film through cyclical deposition and etch, the method comprising: forming the semiconductor film incorporating the dopant atoms among semiconductor atoms, wherein the dopant atoms are incorporated at a first dopant concentration; and etching a portion of the semiconductor film, wherein etching preferentially removes semiconductor atoms relative to the dopant atoms such that etching leaves a remaining portion of the semiconductor film having a second dopant concentration higher than the first dopant concentration.",
    "2. A method of incorporating an electrical dopant in a semiconductor film through cyclical deposition and etch, the method comprising: forming a first semiconductor material incorporating the dopant at a first dopant concentration; preferentially etching a portion of the first semiconductor material, wherein preferentially etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration; forming a second semiconductor material on the first etched semiconductor material, the second semiconductor material incorporating the dopant at a third dopant concentration; and preferentially etching a portion of the second semiconductor material to leave a second etched semiconductor material incorporating the dopant at a fourth dopant concentration higher than the third dopant concentration.",
    "3. The method of claim 2, wherein forming the first and second semiconductor materials comprises chemical vapor depositing in situ doped first and second silicon layers.",
    "4. The method of claim 2, wherein the dopant comprises an n-type dopant.",
    "5. The method of claim 2, wherein the dopant comprises phosphorus.",
    "6. The method of claim 2, wherein forming the first and semiconductor materials and preferentially etching the portions of the first and second semiconductor materials are carried out at a substrate temperature between about 400° C. and about 500° C.",
    "7. The method of claim 2, wherein forming the first and second semiconductor materials and preferentially etching the portions of the first and second semiconductor materials are carried out at a pressure between about 20 Torr and about 40 Torr.",
    "8. The method of claim 2 wherein chemical vapor depositing the first semiconductor material includes incorporating the dopant to have the first electrically active concentration of between about 5×10 20 /cm 3 and about 2.5×10 21 /cm 3.",
    "9. The method of claim 2, wherein a concentration of the dopants in the semiconductor film is between about 7×10 20 /cm 3 and about 4.5×10 21 /cm 3.",
    "10. The method of claim 2, wherein chemical vapor depositing the first and second silicon layers includes epitaxially depositing.",
    "11. The method of claim 2, wherein forming the first and second semiconductor material includes depositing for a duration between about 5 seconds and about 15 seconds.",
    "12. The method of claim 11, wherein forming the first and second semiconductor materials include depositing a thickness between about 20 Å and about 60 Å.",
    "13. The method of claim 2, wherein preferentially etching portions of the first and second semiconductor materials includes etching for a duration between about 1 and 3 seconds.",
    "14. The method of claim 12, wherein preferentially etching portions of the first and second semiconductor materials includes etching a thickness between about 15 Å and about 55 Å.",
    "15. The method of claim 2, wherein forming the first and second semiconductor materials comprises incorporating less than about 0.1 atomic % carbon.",
    "16. The method of claim 2, wherein forming the first and second semiconductor materials comprises chemical vapor depositing doped first and second silicon layers using precursors that do not include a carbon containing precursor.",
    "17. The method of claim 2, wherein preferentially etching the portion of the first semiconductor material and preferentially etching the portion of the second semiconductor material comprises using etchants that do not include a germanium source.",
    "18. The method of claim 2, wherein preferentially etching the portion of the first semiconductor material and preferentially etching the portion of the second semiconductor material comprises using etchants that do not include hydrochloric acid (HCl).",
    "19. A method of forming a doped semiconductor, comprising: depositing a semiconductor layer incorporating an electrical dopant; and subsequently increasing a concentration of the dopant without adding electrical dopant.",
    "20. The method of claim 19, wherein increasing the concentration comprises preferentially etching such that semiconductor material is removed from the semiconductor layer at a higher rate than the dopant is removed.",
    "21. The method of claim 19, wherein preferentially etching comprises removing more than 50% of the semiconductor material from the semiconductor layer.",
    "22. A semiconductor device comprising: a substrate; and an as-deposited epitaxial semiconductor layer on the substrate, wherein the as-deposited epitaxial layer has a uniform dopant concentration exceeding about 15 atomic %.",
    "23. The semiconductor device of claim 22, wherein the epitaxial semiconductor layer has a dopant profile characteristic of an as-deposited, in situ doped layer.",
    "24. The semiconductor device of claim 22, wherein the epitaxial semiconductor layer comprises a strained single crystalline region.",
    "25. The semiconductor device of claim 22, wherein the dopant comprises phosphorus.",
    "26. The method of claim 1, wherein etching includes preferentially removing semiconductor atoms using an etchant including a halide-containing vapor compound.",
    "27. The method of claim 26, wherein the etchant includes Cl 2.",
    "28. The method of claim 27, wherein the etchant does not include HCl."
  ],
  "description_excerpt": "1. Field of the Technology\n\nThe disclosed technology relates generally to semiconductor films and more particularly to semiconductor films incorporating dopants at desired concentrations.\n\n2. Description of the Related Art\n\nHighly doped semiconductor regions find many uses in various semiconductor devices. For example, in advanced transistor scaling (e.g., below about 20 node), such highly doped semiconductor regions may be advantageously used to form abrupt junctions, for example, to reduce short channel effects, by providing ultra-shallow source and drain junctions, such that loss of channel control by the gate due to source and drain depletion regions can be minimized. In three-dimensional transistors, for example in tri-gate or fin field effect transistors (finFETs), such highly doped semiconductor regions may provide strain in the channel of the finFETs that enhance the mobility of carriers, e.g., electrons in NMOS finFETs.\n\nFormation of such highly doped semiconductor regions by many known techniques can result in certain undesirable effects. For example, the source and drain junctions formed by traditional techniques such as ion implantation results in a Gaussian distribution of dopants having a relatively large straggle, which can limit the abruptness of the junctions. In addition, the channeling of the dopant can lead to increase in the depth of the source and the drain, leading to short channel effects. Ion implantation is also limited in certain applications due to its tendency to destroy crystal structure, particularly for heavy doping steps.",
  "cpc": [
    "H10D 62/60",
    "H01L 21/02532",
    "H01L 21/02576",
    "H01L 21/0262",
    "H01L 21/30604",
    "H01L 29/36",
    "H10P 14/24",
    "H10P 14/3411",
    "H10P 14/3442",
    "H10P 50/242",
    "H10P 50/266",
    "H10P 50/642"
  ],
  "ipc": [
    "H01L 29/167",
    "H01L 29/36",
    "H10P 14/24",
    "H10P 14/26",
    "H10P 32/16",
    "H10P 34/42",
    "H10P 72/00",
    "H10P 72/10",
    "H10P 72/30",
    "H10P 72/50"
  ],
  "assignees": [
    "ASM IP Holding BV"
  ],
  "inventors": [
    "Keith Doran Weeks",
    "John Tolle",
    "Matthew G. Goodman",
    "Sandeep Mehta"
  ],
  "filing_date": "2013-12-30",
  "publication_date": "2015-08-04",
  "grant_date": "2015-08-04",
  "priority_date": "2013-07-12",
  "application_number": "US-201314143719-A",
  "family_id": "52276472",
  "cited_by_count": 417,
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}