Patent · US9911676B2 · B2 · US
System and method for gas-phase passivation of a semiconductor surface
- (11) Publication number
- US9911676B2
- (21) Application number
- 15/397,237
- (22) Filing date
- 2017-01-03
- (30) Priority date
- 2012-07-27
- (43) Publication date
- 2018-03-06
- (45) Date of grant
- 2018-03-06
- (51) IPC
- C23C 16/40; C23C 16/455; H01L 21/02; H01L 23/29; H01L 23/31
- (52) CPC
- H10W Generic packages, interconnections, connectors or other constructional details of devices covered by class H10: 74/137, 74/40, 74/43, 74/47
- C23C Coating metallic material; coating material with metallic material; surface treatment of metallic material by diffusion into the surface, by chemical conversion or substitution; coating by vacuum evaporation, by sputtering, by ion implantation or by chemical vapour deposition, in general: 16/0227, 16/0272, 16/305, 16/40, 16/45544
- H01L Semiconductor devices; electric solid state devices not otherwise provided for: 21/02178, 21/02205, 21/02274, 21/0228, 21/02301, 23/291, 23/3171
- H10D Inorganic electric semiconductor devices: 1/00
- H10P Generic processes or apparatus for the manufacture or treatment of devices covered by class H10: 14/3411, 14/3421, 14/38, 14/6336, 14/6339, 14/6504, 14/6512, 14/668, 14/69391, 50/00
- (73) Assignee
- ASM IP Holding BV
- (72) Inventors
- Fu Tang; Michael E. Givens; Qi Xie; Xiaoqiang Jiang; Petri Raisanen; Pauline Calka
- (54) Title
- System and method for gas-phase passivation of a semiconductor surface
- (57) Abstract
Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.
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Claims (20)
- A method of passivating a surface of a semiconductor, the method comprising the steps of: providing the surface of the semiconductor to a reaction chamber of a reactor; exposing the surface of the semiconductor to a gas-phase chalcogen precursor selected from the group consisting of NH 4 HS, (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, SeC(NH 2) 2, and combinations of such compounds in the reaction chamber; and passivating the surface of the semiconductor in the reaction chamber using the gas-phase chalcogen precursor to form a passivated semiconductor surface, wherein a pressure within the reaction chamber is between 0.5 Torr and 760 Torr.
- The method of passivating a surface of a semiconductor according to claim 1, wherein a source for the chalcogen precursor is selected from the group consisting of thiourea, SC(NH 2) 2, and SeC(NH 2) 2.
- The method of passivating a surface of a semiconductor according to claim 1, further comprising the step of depositing dielectric material onto the passivated semiconductor surface.
- The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material and the step of exposing the surface of the semiconductor to a gas-phase chalcogen-precursor are performed in the same reactor.
- The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material and the step of exposing the surface of the semiconductor to a gas-phase precursor are performed in separate reactors.
- The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material comprises depositing aluminum oxide.
- The method of passivating a surface of a semiconductor according to claim 1, wherein the semiconductor is a high-mobility semiconductor selected from the group consisting of germanium, silicon germanium, and III-V semiconductor materials.
- The method of passivating a surface of a semiconductor according to claim 1, further comprising the step of cleaning the surface of a semiconductor prior, using an in-situ gas-phase process, prior to the step of exposing the surface of the semiconductor to a gas-phase chalcogen precursor.
- The method of passivating a surface of a semiconductor according to claim 1, wherein the step of exposing the surface comprises exposing the surface of the semiconductor wafer to a plasma process.
- The method of passivating a surface of a semiconductor according to claim 1, wherein the step of providing the surface of the semiconductor to a reaction chamber of a reactor comprises providing the surface within an atomic layer deposition reactor.
- The method of passivating a surface of a semiconductor according to claim 1, further comprising the steps of providing a carrier gas and mixing the carrier gas with the gas-phase chalcogen precursor.
- A system for passivating a surface of a semiconductor, the system comprising: a reactor; and a chalcogen precursor source fluidly coupled to the reactor, wherein the chalcogen precursor source provides a gas-phase chalcogen precursor to a reaction chamber of the reactor, and wherein the chalcogen precursor source is selected from the group consisting of NH 4 HS, (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, SeC(NH 2) 2, and combinations of such compounds.
- The system for passivating a surface of a semiconductor of claim 12, wherein the chalcogen precursor source is selected from the group consisting of (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, and SeC(NH 2) 2.
- The system for passivating a surface of a semiconductor of claim 12, further comprising a cleaning source fluidly coupled to the reactor.
- The system for passivating a surface of a semiconductor of claim 14, wherein the cleaning source is selected from the group consisting of HCl, HF, NH 4 OH, H 2, and hydrogen plasma.
- The system for passivating a surface of a semiconductor of claim 12, wherein the reactor comprises an atomic layer deposition reactor.
- The system for passivating a surface of a semiconductor of claim 12, further comprising a plasma apparatus.
- A structure formed using the method claim 1, the structure comprising: a dielectric layer overlying the surface of the semiconductor.
- The structure of claim 18, wherein the structure exhibits a D it at midgap of less than about 1.8 e 12 (/cm 2 eV).
- The structure of claim 18, wherein the structure exhibits a D it near a band edge of less than about 1 e 12 (/cm 2 eV).
Description
The disclosure generally relates to methods and systems used to manufacture semiconductor devices and to devices formed using the systems and methods. More particularly, exemplary embodiments of the present disclosure relate to systems and methods for gas-phase chalcogen (e.g., sulfur, tellurium, and/or selenium) passivation of a semiconductor surface.
High-mobility semiconductors, such as germanium and silicon germanium Group IV semiconductors, and compound semiconductors (e.g., III-V compound semiconductors) may be desirable to use in the fabrication of semiconductor devices because of their relatively high electron and/or hole mobility. Devices formed with high-mobility semiconductor material may theoretically exhibit better performance, faster speeds, reduced power consumption, and have higher breakdown fields compared to similar devices formed with a lower-mobility semiconductor, such as silicon.
High-mobility semiconductor materials may be used, for example, to fabricate metal oxide field effect (MOSFET) devices. A typical MOSFET device includes a source region, a drain region, and a channel region, each formed of semiconductor material. The MOSFET also includes a dielectric material (gate dielectric) and conductive material (e.g., metal) overlying the channel region. The dielectric material and conductive material are formed by depositing the respective materials using vacuum or gas-phase deposition techniques, such as chemical vapor deposition, plasma-enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, or the like.
Citations (5)
- US5616947A
- US20050092247A1
- US20090042344A1
- US20100163937A1
- US20110089469A1
Record as JSON
{
"publication_number": "US9911676B2",
"country": "US",
"kind": "B2",
"title": "System and method for gas-phase passivation of a semiconductor surface",
"abstract": "Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.",
"claims": [
"1. A method of passivating a surface of a semiconductor, the method comprising the steps of: providing the surface of the semiconductor to a reaction chamber of a reactor; exposing the surface of the semiconductor to a gas-phase chalcogen precursor selected from the group consisting of NH 4 HS, (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, SeC(NH 2) 2, and combinations of such compounds in the reaction chamber; and passivating the surface of the semiconductor in the reaction chamber using the gas-phase chalcogen precursor to form a passivated semiconductor surface, wherein a pressure within the reaction chamber is between 0.5 Torr and 760 Torr.",
"2. The method of passivating a surface of a semiconductor according to claim 1, wherein a source for the chalcogen precursor is selected from the group consisting of thiourea, SC(NH 2) 2, and SeC(NH 2) 2.",
"3. The method of passivating a surface of a semiconductor according to claim 1, further comprising the step of depositing dielectric material onto the passivated semiconductor surface.",
"4. The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material and the step of exposing the surface of the semiconductor to a gas-phase chalcogen-precursor are performed in the same reactor.",
"5. The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material and the step of exposing the surface of the semiconductor to a gas-phase precursor are performed in separate reactors.",
"6. The method of passivating a surface of a semiconductor according to claim 3, wherein the step of depositing dielectric material comprises depositing aluminum oxide.",
"7. The method of passivating a surface of a semiconductor according to claim 1, wherein the semiconductor is a high-mobility semiconductor selected from the group consisting of germanium, silicon germanium, and III-V semiconductor materials.",
"8. The method of passivating a surface of a semiconductor according to claim 1, further comprising the step of cleaning the surface of a semiconductor prior, using an in-situ gas-phase process, prior to the step of exposing the surface of the semiconductor to a gas-phase chalcogen precursor.",
"9. The method of passivating a surface of a semiconductor according to claim 1, wherein the step of exposing the surface comprises exposing the surface of the semiconductor wafer to a plasma process.",
"10. The method of passivating a surface of a semiconductor according to claim 1, wherein the step of providing the surface of the semiconductor to a reaction chamber of a reactor comprises providing the surface within an atomic layer deposition reactor.",
"11. The method of passivating a surface of a semiconductor according to claim 1, further comprising the steps of providing a carrier gas and mixing the carrier gas with the gas-phase chalcogen precursor.",
"12. A system for passivating a surface of a semiconductor, the system comprising: a reactor; and a chalcogen precursor source fluidly coupled to the reactor, wherein the chalcogen precursor source provides a gas-phase chalcogen precursor to a reaction chamber of the reactor, and wherein the chalcogen precursor source is selected from the group consisting of NH 4 HS, (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, SeC(NH 2) 2, and combinations of such compounds.",
"13. The system for passivating a surface of a semiconductor of claim 12, wherein the chalcogen precursor source is selected from the group consisting of (NH 4) 2 Se, (NH 4) 2 Te, H 2 Te, NH 4 HSe, an organochalcogen compound, SC(NH 2) 2, and SeC(NH 2) 2.",
"14. The system for passivating a surface of a semiconductor of claim 12, further comprising a cleaning source fluidly coupled to the reactor.",
"15. The system for passivating a surface of a semiconductor of claim 14, wherein the cleaning source is selected from the group consisting of HCl, HF, NH 4 OH, H 2, and hydrogen plasma.",
"16. The system for passivating a surface of a semiconductor of claim 12, wherein the reactor comprises an atomic layer deposition reactor.",
"17. The system for passivating a surface of a semiconductor of claim 12, further comprising a plasma apparatus.",
"18. A structure formed using the method claim 1, the structure comprising: a dielectric layer overlying the surface of the semiconductor.",
"19. The structure of claim 18, wherein the structure exhibits a D it at midgap of less than about 1.8 e 12 (/cm 2 eV).",
"20. The structure of claim 18, wherein the structure exhibits a D it near a band edge of less than about 1 e 12 (/cm 2 eV)."
],
"description_excerpt": "The disclosure generally relates to methods and systems used to manufacture semiconductor devices and to devices formed using the systems and methods. More particularly, exemplary embodiments of the present disclosure relate to systems and methods for gas-phase chalcogen (e.g., sulfur, tellurium, and/or selenium) passivation of a semiconductor surface.\n\nHigh-mobility semiconductors, such as germanium and silicon germanium Group IV semiconductors, and compound semiconductors (e.g., III-V compound semiconductors) may be desirable to use in the fabrication of semiconductor devices because of their relatively high electron and/or hole mobility. Devices formed with high-mobility semiconductor material may theoretically exhibit better performance, faster speeds, reduced power consumption, and have higher breakdown fields compared to similar devices formed with a lower-mobility semiconductor, such as silicon.\n\nHigh-mobility semiconductor materials may be used, for example, to fabricate metal oxide field effect (MOSFET) devices. A typical MOSFET device includes a source region, a drain region, and a channel region, each formed of semiconductor material. The MOSFET also includes a dielectric material (gate dielectric) and conductive material (e.g., metal) overlying the channel region. The dielectric material and conductive material are formed by depositing the respective materials using vacuum or gas-phase deposition techniques, such as chemical vapor deposition, plasma-enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, or the like.",
"cpc": [
"H10W 74/137",
"C23C 16/0227",
"C23C 16/0272",
"C23C 16/305",
"C23C 16/40",
"C23C 16/45544",
"H01L 21/02178",
"H01L 21/02205",
"H01L 21/02274",
"H01L 21/0228",
"H01L 21/02301",
"H01L 23/291",
"H01L 23/3171",
"H10D 1/00",
"H10P 14/3411",
"H10P 14/3421",
"H10P 14/38",
"H10P 14/6336",
"H10P 14/6339",
"H10P 14/6504",
"H10P 14/6512",
"H10P 14/668",
"H10P 14/69391",
"H10P 50/00",
"H10W 74/40",
"H10W 74/43",
"H10W 74/47"
],
"ipc": [
"C23C 16/40",
"C23C 16/455",
"H01L 21/02",
"H01L 23/29",
"H01L 23/31"
],
"assignees": [
"ASM IP Holding BV"
],
"inventors": [
"Fu Tang",
"Michael E. Givens",
"Qi Xie",
"Xiaoqiang Jiang",
"Petri Raisanen",
"Pauline Calka"
],
"filing_date": "2017-01-03",
"publication_date": "2018-03-06",
"grant_date": "2018-03-06",
"priority_date": "2012-07-27",
"application_number": "US-201715397237-A",
"family_id": "58558970",
"cited_by_count": 467,
"citations": [
"US5616947A",
"US20050092247A1",
"US20090042344A1",
"US20100163937A1",
"US20110089469A1"
]
}
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