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Design rule check

Term · Semiconductors · MLC-T-SEM-000372

A process in electronic design automation (EDA) that verifies whether a semiconductor layout adheres to a set of predefined geometric and electrical constraints. These rules specify minimum line widths, spacing between features, and other physical parameters to guarantee manufacturability and device performance. The output is a report detailing violations that must be corrected before fabrication.

Table 1. Record
IdentifierMLC-T-SEM-000372
FieldSemiconductors
SubjectDesign, EDA & Devices
AbbreviationDRC
Record as JSON 
{
  "id": "MLC-T-SEM-000372",
  "term": "Design rule check",
  "field": "Semiconductors",
  "definition": "A process in electronic design automation (EDA) that verifies whether a semiconductor layout adheres to a set of predefined geometric and electrical constraints. These rules specify minimum line widths, spacing between features, and other physical parameters to guarantee manufacturability and device performance. The output is a report detailing violations that must be corrected before fabrication.",
  "abbreviation": "DRC",
  "subject": "Design, EDA & Devices",
  "url": "https://mlchart.com/terminology/semiconductors/design-rule-check/"
}

Record 87 of 390 in Semiconductors terminology (MLC-0108). Request the full dataset.