MLchartDataset catalogue

Patent · US9899465B2 · B2 · US

Redistribution layer for substrate contacts

(11) Publication number
US9899465B2
(21) Application number
14/807,259
(22) Filing date
2015-07-23
(30) Priority date
2014-09-25
(43) Publication date
2018-02-20
(45) Date of grant
2018-02-20
(51) IPC
H01L 33/58; H01L 33/62; G06F 3/041; G06F 3/044; H01L 25/04; H01L 25/075; H01L 27/15; H01L 27/32; H01L 33/60; H01L 33/64; H01L 51/52; H01L 51/56
(52) CPC
  • G06F Electric digital data processing: 3/04166, 2203/04104, 3/0412, 3/0416, 3/04164, 3/042, 3/044
  • H01L Semiconductor devices; electric solid state devices not otherwise provided for: 2227/326, 25/048, 25/0753, 27/156, 27/3276, 27/3288, 27/3293, 2933/0066, 2933/0075, 33/58, 33/62, 33/64, 51/529, 51/56
  • H10H Inorganic light-emitting semiconductor devices having potential barriers: 20/0364, 20/0365, 20/855, 20/857, 20/858, 29/142
  • H10K Organic electric solid-state devices: 59/1201, 59/131, 59/179, 59/18, 71/80
  • H10W Generic packages, interconnections, connectors or other constructional details of devices covered by class H10: 70/60, 90/00
(73) Assignee
X Celeprint Ltd
(72) Inventors
Christopher Bower; Matthew Meitl; Ronald S. Cok
(54) Title
Redistribution layer for substrate contacts
(57) Abstract

A structure with an interconnection layer for redistribution of electrical connections includes a plurality of first electrical connections disposed on a substrate in a first arrangement. An insulating layer is disposed on the substrate over the first electrical connections. A plurality of second electrical connections is disposed on the insulating layer on a side of the insulating layer opposite the plurality of first electrical connections in a second arrangement. Each second electrical connection is electrically connected to a respective first electrical connection. An integrated circuit is disposed on the substrate and is electrically connected to the first electrical connections. The first electrical connections in the first arrangement have a greater spatial density than the second electrical connections in the second arrangement.

Full text
View on Google Patents

Claims (18)

  1. A structure with an interconnection layer for redistribution of electrical connections, comprising: a substrate having a side; a plurality of first electrical connections disposed on the side of the substrate in a first arrangement, each of the first electrical connections having a first size; a single insulating layer comprising a cured material coated on the side of the substrate over the first electrical connections; a plurality of second electrical connections disposed on the insulating layer in a second arrangement and disposed on a side of the insulating layer opposite the plurality of first electrical connections, each of the second electrical connections having a second size, wherein the second sizes are greater than the first sizes, each second electrical connection of the plurality of second electrical connections electrically connected to a respective first electrical connection through a via having a size corresponding to the first size of the respective first electrical connection and smaller than the second sizes of the plurality of second electrical connections; a plurality of integrated circuits disposed on the side of the substrate, each electrically connected to a set of the first electrical connections that are more closely spaced within the set on the substrate side than within a corresponding set of the second electrical connections on the insulating layer.
  2. The structure of claim 1, wherein one or more vias are located above a corresponding first electrical connection, one or more vias are located below a corresponding second electrical connection, or one or more vias are located above a corresponding first electrical connection and one or more vias are located below a corresponding second electrical connection.
  3. The structure of claim 1, wherein one or more micro-wires are located on the same side of the insulating layer as the first electrical connections or one or more micro-wires are located on the same side of the insulating layer as the second electrical contacts, or both.
  4. The structure of claim 1, wherein one or more first micro-wires are located on the same side of the insulating layer as the first electrical connections and one or more second micro-wires are located on the same side of the insulating layer as the second electrical contacts and wherein the first micro-wires have a width that is less than the width of the second micro-wires.
  5. The structure of claim 1, wherein one or more of the first electrical connections have a first area and one or more of the second electrical connections have a second area greater than the first area.
  6. The structure of claim 1, wherein the insulating layer is a black matrix, includes light-absorbing dyes, includes light-absorbing pigments, or is black when exposed to visible light.
  7. The structure of claim 1, comprising: a plurality of micro-wires; and a plurality of vias in the insulating layer, wherein each second electrical connection of the plurality of second electrical connections is electrically connected to a respective connection of the first electrical connections through a via of the plurality of vias and a micro-wire of the plurality of micro-wires.
  8. The structure of claim 7, wherein the micro-wires electrically connect the first electrical connections to the vias.
  9. The structure of claim 8, comprising wires electrically connecting the vias to the second electrical connections and wherein the wires are wider than the micro-wires.
  10. The structure of claim 1, wherein two or more of the first electrical connections are separated by less than 100 microns and the second electrical connections are separated by at least 100 microns.
  11. The structure of claim 1, wherein one of the plurality of integrated circuits has external electrical connections having a spacing equal to or less than a spacing of the first electrical connections in the first arrangement.
  12. The structure of claim 1, wherein one of the plurality of integrated circuits is an inorganic light emitter or an inorganic light-emitting diode.
  13. The structure of claim 1, wherein the plurality of integrated circuits are in a regular arrangement forming a display.
  14. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and a second integrated circuit, wherein the first integrated circuit has external electrical connections spaced apart by a first distance, and the second integrated circuit has external electrical connections spaced apart by a second distance equal to or greater than the first distance.
  15. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and the structure comprises a second integrated circuit disposed on the insulating layer and electrically connected to at least one of the second electrical connections and wherein the first integrated circuit electrically communicates with the second integrated circuit.
  16. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and the structure comprises a second integrated circuit disposed on the insulating layer and electrically connected to at least one of the second electrical connections and wherein the second integrated circuit electrically controls the first integrated circuit.
  17. The structure of claim 1, wherein the substrate is a tile substrate and the structure comprises a backplane substrate and a plurality of tile substrates affixed to the backplane substrate.
  18. The structure of claim 17, wherein the plurality of integrated circuits are located between the backplane substrate and the tile substrate.

Description

The present invention relates to electrical interconnections for integrated circuits in multiple layers on a substrate.

Flat-panel displays are widely used in conjunction with computing devices, in portable devices, and for entertainment devices such as televisions. Such displays typically employ a plurality of pixels distributed over a display substrate to display images, graphics, or text. For example, liquid crystal displays (LCDs) employ liquid crystals to block or transmit light from a backlight behind the liquid crystals and organic light-emitting diode (OLED) displays rely on passing current through a layer of organic material that glows in response to the electrical current.

Most flat-panel displays use active-matrix thin-film transistors formed in a thin semiconductor layer on a substrate to control an array of light-emitting or light-controlling elements. However, the thin layer of semiconductor material is typically amorphous or has localized crystals, for example in amorphous silicon or polysilicon. These semiconductor material structures have a much lower performance than crystalline semiconductors found in typical integrated circuits. Moreover, it is difficult and expensive to make thin-film semiconductor structures on large substrates, limiting the size of integrated flat-panel devices such as displays. Passive-matrix control structures that do not require a thin-film semiconductor layer are also known but are limited in size resolution, and refresh rate.

Citations (235)

  • US4322735A
  • US4330329A
  • US4591659A
  • US5173759A
  • US6403985B1
  • US5686790A
  • US5621555A
  • US5563470A
  • US5550066A
  • US5780933A
  • US5625202A
  • US5748161A
  • US5739800A
  • US5821571A
  • US5994722A
  • US6084579A
  • US6087680A
  • US5815303A
  • JPH11142878A
  • US6897855B1
  • US6392340B2
  • US6143672A
  • US20010022564A1
  • US6504180B1
  • US6169294B1
  • US6660457B1
  • US6184477B1
  • US20050168987A1
  • US6466281B1
  • US6424028B1
  • US6410942B1
  • US6577367B2
  • US6422716B2
  • US6278242B1
  • US20040180476A1
  • US6717560B2
  • US6828724B2
  • US20020096994A1
  • US6756576B1
  • US7129457B2
  • US6969624B2
  • US6703780B2
  • US6853411B2
  • US20060116046A1
  • US7479731B2
  • US7009220B2
  • US20050006657A1
  • US20050012076A1
  • US20050264472A1
  • US7169652B2
  • US20060055864A1
  • US6975369B1
  • US7605053B2
  • US6812637B2
  • US6933532B2
  • US20040212296A1
  • US7098589B2
  • US20040227704A1
  • US20040252933A1
  • US20050116621A1
  • US7704684B2
  • EP1548571A1
  • US20050140275A1
  • US7195733B2
  • US7012382B2
  • US7288753B2
  • US7091523B2
  • US7799699B2
  • US8440546B2
  • US8664699B2
  • US7622367B1
  • US8754396B2
  • US7943491B2
  • US8394706B2
  • US8198621B2
  • US7557367B2
  • US7521292B2
  • US8039847B2
  • US7982296B2
  • US20050275615A1
  • WO2006027730A1
  • US7420221B2
  • US20060063309A1
  • US7662545B2
  • US7394194B2
  • WO2006099741A1
  • US20080211734A1
  • US20070035340A1
  • US7402951B2
  • US20070077349A1
  • US7605452B2
  • US8531642B2
  • US7466075B2
  • US7586497B2
  • US20100289115A1
  • US20080006843A1
  • US7791271B2
  • US20070201056A1
  • US7990058B2
  • US20090278141A1
  • US8243027B2
  • US7969085B2
  • US8895406B2
  • US7932123B2
  • US7834541B2
  • US8860051B2
  • US20080224153A1
  • US7972875B2
  • US8722458B2
  • WO2008103931A2
  • US7919342B2
  • US8902152B2
  • US7687812B2
  • US8450927B2
  • US8029139B2
  • US7893612B2
  • US8470701B2
  • US8766970B2
  • US20090278142A1
  • US20110067911A1
  • US20090315054A1
  • US20110108800A1
  • US7927976B2
  • US7999454B2
  • US20100060553A1
  • WO2010032603A1
  • US20100078670A1
  • US20100123134A1
  • US20100123268A1
  • US8506867B2
  • US20100148198A1
  • US20100186883A1
  • US20100207852A1
  • US20100214247A1
  • US7816856B2
  • WO2010102310A2
  • US8854294B2
  • US8877648B2
  • US20100248484A1
  • WO2010111601A2
  • US20100258710A1
  • US20100264816A1
  • WO2010132552A1
  • US20100317132A1
  • US8207547B2
  • US20100315319A1
  • US8261660B2
  • US20110043435A1
  • US8817369B2
  • JP2011066130A
  • US20120228669A1
  • US8288843B2
  • US20110133324A1
  • US20120223875A1
  • US8502192B2
  • US8334545B2
  • US20130273695A1
  • US20110211348A1
  • US20130196474A1
  • US20130221355A1
  • US20120080692A1
  • US8735932B2
  • US20120119249A1
  • US20120141799A1
  • US8803857B2
  • US8686447B2
  • US20120223636A1
  • US20120256163A1
  • US20150135525A1
  • US8889485B2
  • US20120314388A1
  • US20120319563A1
  • US20130015483A1
  • US20130069275A1
  • US20130088416A1
  • US8605452B2
  • US20140138543A1
  • WO2013064800A1
  • GB2496183A
  • US8794501B2
  • US20130207964A1
  • US8884844B2
  • US8946760B2
  • US20140306248A1
  • WO2013165124A1
  • US20130309792A1
  • US20130328190A1
  • US8519543B1
  • US20140231839A1
  • US20140104243A1
  • US20140146273A1
  • US9202996B2
  • US9178123B2
  • US9153171B2
  • US20170206845A1
  • US9626908B2
  • US20140175498A1
  • US20140183446A1
  • US20140231851A1
  • US20140217448A1
  • WO2014121635A1
  • US9308649B2
  • WO2014149864A1
  • US20140267683A1
  • US20140264763A1
  • US8791474B1
  • US20140367705A1
  • US20150137153A1
  • US8987765B2
  • US20140367633A1
  • US20150169011A1
  • US20150263066A1
  • US20150280089A1
  • US20150280066A1
  • US9105813B1
  • US20150371974A1
  • US20150372053A1
  • US20150373793A1
  • US20150371585A1
  • US20160005721A1
  • US20160018094A1
  • US20150372051A1
  • US20150372052A1
  • US20150372393A1
  • US9520537B2
  • US9437782B2
  • US9444015B2
  • US20160064363A1
  • US9537069B1
  • US20170047393A1
  • WO2016046283A2
  • US20160093600A1
  • US20170187976A1
  • WO2017144573A1
  • US20170250167A1
Record as JSON 
{
  "publication_number": "US9899465B2",
  "country": "US",
  "kind": "B2",
  "title": "Redistribution layer for substrate contacts",
  "abstract": "A structure with an interconnection layer for redistribution of electrical connections includes a plurality of first electrical connections disposed on a substrate in a first arrangement. An insulating layer is disposed on the substrate over the first electrical connections. A plurality of second electrical connections is disposed on the insulating layer on a side of the insulating layer opposite the plurality of first electrical connections in a second arrangement. Each second electrical connection is electrically connected to a respective first electrical connection. An integrated circuit is disposed on the substrate and is electrically connected to the first electrical connections. The first electrical connections in the first arrangement have a greater spatial density than the second electrical connections in the second arrangement.",
  "claims": [
    "1. A structure with an interconnection layer for redistribution of electrical connections, comprising: a substrate having a side; a plurality of first electrical connections disposed on the side of the substrate in a first arrangement, each of the first electrical connections having a first size; a single insulating layer comprising a cured material coated on the side of the substrate over the first electrical connections; a plurality of second electrical connections disposed on the insulating layer in a second arrangement and disposed on a side of the insulating layer opposite the plurality of first electrical connections, each of the second electrical connections having a second size, wherein the second sizes are greater than the first sizes, each second electrical connection of the plurality of second electrical connections electrically connected to a respective first electrical connection through a via having a size corresponding to the first size of the respective first electrical connection and smaller than the second sizes of the plurality of second electrical connections; a plurality of integrated circuits disposed on the side of the substrate, each electrically connected to a set of the first electrical connections that are more closely spaced within the set on the substrate side than within a corresponding set of the second electrical connections on the insulating layer.",
    "2. The structure of claim 1, wherein one or more vias are located above a corresponding first electrical connection, one or more vias are located below a corresponding second electrical connection, or one or more vias are located above a corresponding first electrical connection and one or more vias are located below a corresponding second electrical connection.",
    "3. The structure of claim 1, wherein one or more micro-wires are located on the same side of the insulating layer as the first electrical connections or one or more micro-wires are located on the same side of the insulating layer as the second electrical contacts, or both.",
    "4. The structure of claim 1, wherein one or more first micro-wires are located on the same side of the insulating layer as the first electrical connections and one or more second micro-wires are located on the same side of the insulating layer as the second electrical contacts and wherein the first micro-wires have a width that is less than the width of the second micro-wires.",
    "5. The structure of claim 1, wherein one or more of the first electrical connections have a first area and one or more of the second electrical connections have a second area greater than the first area.",
    "6. The structure of claim 1, wherein the insulating layer is a black matrix, includes light-absorbing dyes, includes light-absorbing pigments, or is black when exposed to visible light.",
    "7. The structure of claim 1, comprising: a plurality of micro-wires; and a plurality of vias in the insulating layer, wherein each second electrical connection of the plurality of second electrical connections is electrically connected to a respective connection of the first electrical connections through a via of the plurality of vias and a micro-wire of the plurality of micro-wires.",
    "8. The structure of claim 7, wherein the micro-wires electrically connect the first electrical connections to the vias.",
    "9. The structure of claim 8, comprising wires electrically connecting the vias to the second electrical connections and wherein the wires are wider than the micro-wires.",
    "10. The structure of claim 1, wherein two or more of the first electrical connections are separated by less than 100 microns and the second electrical connections are separated by at least 100 microns.",
    "11. The structure of claim 1, wherein one of the plurality of integrated circuits has external electrical connections having a spacing equal to or less than a spacing of the first electrical connections in the first arrangement.",
    "12. The structure of claim 1, wherein one of the plurality of integrated circuits is an inorganic light emitter or an inorganic light-emitting diode.",
    "13. The structure of claim 1, wherein the plurality of integrated circuits are in a regular arrangement forming a display.",
    "14. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and a second integrated circuit, wherein the first integrated circuit has external electrical connections spaced apart by a first distance, and the second integrated circuit has external electrical connections spaced apart by a second distance equal to or greater than the first distance.",
    "15. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and the structure comprises a second integrated circuit disposed on the insulating layer and electrically connected to at least one of the second electrical connections and wherein the first integrated circuit electrically communicates with the second integrated circuit.",
    "16. The structure of claim 1, wherein the plurality of integrated circuits comprises a first integrated circuit and the structure comprises a second integrated circuit disposed on the insulating layer and electrically connected to at least one of the second electrical connections and wherein the second integrated circuit electrically controls the first integrated circuit.",
    "17. The structure of claim 1, wherein the substrate is a tile substrate and the structure comprises a backplane substrate and a plurality of tile substrates affixed to the backplane substrate.",
    "18. The structure of claim 17, wherein the plurality of integrated circuits are located between the backplane substrate and the tile substrate."
  ],
  "description_excerpt": "The present invention relates to electrical interconnections for integrated circuits in multiple layers on a substrate.\n\nFlat-panel displays are widely used in conjunction with computing devices, in portable devices, and for entertainment devices such as televisions. Such displays typically employ a plurality of pixels distributed over a display substrate to display images, graphics, or text. For example, liquid crystal displays (LCDs) employ liquid crystals to block or transmit light from a backlight behind the liquid crystals and organic light-emitting diode (OLED) displays rely on passing current through a layer of organic material that glows in response to the electrical current.\n\nMost flat-panel displays use active-matrix thin-film transistors formed in a thin semiconductor layer on a substrate to control an array of light-emitting or light-controlling elements. However, the thin layer of semiconductor material is typically amorphous or has localized crystals, for example in amorphous silicon or polysilicon. These semiconductor material structures have a much lower performance than crystalline semiconductors found in typical integrated circuits. Moreover, it is difficult and expensive to make thin-film semiconductor structures on large substrates, limiting the size of integrated flat-panel devices such as displays. Passive-matrix control structures that do not require a thin-film semiconductor layer are also known but are limited in size resolution, and refresh rate.",
  "cpc": [
    "G06F 3/04166",
    "G06F 2203/04104",
    "G06F 3/0412",
    "G06F 3/0416",
    "G06F 3/04164",
    "G06F 3/042",
    "G06F 3/044",
    "H01L 2227/326",
    "H01L 25/048",
    "H01L 25/0753",
    "H01L 27/156",
    "H01L 27/3276",
    "H01L 27/3288",
    "H01L 27/3293",
    "H01L 2933/0066",
    "H01L 2933/0075",
    "H01L 33/58",
    "H01L 33/62",
    "H01L 33/64",
    "H01L 51/529",
    "H01L 51/56",
    "H10H 20/0364",
    "H10H 20/0365",
    "H10H 20/855",
    "H10H 20/857",
    "H10H 20/858",
    "H10H 29/142",
    "H10K 59/1201",
    "H10K 59/131",
    "H10K 59/179",
    "H10K 59/18",
    "H10K 71/80",
    "H10W 70/60",
    "H10W 90/00"
  ],
  "ipc": [
    "H01L 33/58",
    "H01L 33/62",
    "G06F 3/041",
    "G06F 3/044",
    "H01L 25/04",
    "H01L 25/075",
    "H01L 27/15",
    "H01L 27/32",
    "H01L 33/60",
    "H01L 33/64",
    "H01L 51/52",
    "H01L 51/56"
  ],
  "assignees": [
    "X Celeprint Ltd"
  ],
  "inventors": [
    "Christopher Bower",
    "Matthew Meitl",
    "Ronald S. Cok"
  ],
  "filing_date": "2015-07-23",
  "publication_date": "2018-02-20",
  "grant_date": "2018-02-20",
  "priority_date": "2014-09-25",
  "application_number": "US-201514807259-A",
  "family_id": "57731017",
  "cited_by_count": 25,
  "citations": [
    "US4322735A",
    "US4330329A",
    "US4591659A",
    "US5173759A",
    "US6403985B1",
    "US5686790A",
    "US5621555A",
    "US5563470A",
    "US5550066A",
    "US5780933A",
    "US5625202A",
    "US5748161A",
    "US5739800A",
    "US5821571A",
    "US5994722A",
    "US6084579A",
    "US6087680A",
    "US5815303A",
    "JPH11142878A",
    "US6897855B1",
    "US6392340B2",
    "US6143672A",
    "US20010022564A1",
    "US6504180B1",
    "US6169294B1",
    "US6660457B1",
    "US6184477B1",
    "US20050168987A1",
    "US6466281B1",
    "US6424028B1",
    "US6410942B1",
    "US6577367B2",
    "US6422716B2",
    "US6278242B1",
    "US20040180476A1",
    "US6717560B2",
    "US6828724B2",
    "US20020096994A1",
    "US6756576B1",
    "US7129457B2",
    "US6969624B2",
    "US6703780B2",
    "US6853411B2",
    "US20060116046A1",
    "US7479731B2",
    "US7009220B2",
    "US20050006657A1",
    "US20050012076A1",
    "US20050264472A1",
    "US7169652B2",
    "US20060055864A1",
    "US6975369B1",
    "US7605053B2",
    "US6812637B2",
    "US6933532B2",
    "US20040212296A1",
    "US7098589B2",
    "US20040227704A1",
    "US20040252933A1",
    "US20050116621A1",
    "US7704684B2",
    "EP1548571A1",
    "US20050140275A1",
    "US7195733B2",
    "US7012382B2",
    "US7288753B2",
    "US7091523B2",
    "US7799699B2",
    "US8440546B2",
    "US8664699B2",
    "US7622367B1",
    "US8754396B2",
    "US7943491B2",
    "US8394706B2",
    "US8198621B2",
    "US7557367B2",
    "US7521292B2",
    "US8039847B2",
    "US7982296B2",
    "US20050275615A1",
    "WO2006027730A1",
    "US7420221B2",
    "US20060063309A1",
    "US7662545B2",
    "US7394194B2",
    "WO2006099741A1",
    "US20080211734A1",
    "US20070035340A1",
    "US7402951B2",
    "US20070077349A1",
    "US7605452B2",
    "US8531642B2",
    "US7466075B2",
    "US7586497B2",
    "US20100289115A1",
    "US20080006843A1",
    "US7791271B2",
    "US20070201056A1",
    "US7990058B2",
    "US20090278141A1",
    "US8243027B2",
    "US7969085B2",
    "US8895406B2",
    "US7932123B2",
    "US7834541B2",
    "US8860051B2",
    "US20080224153A1",
    "US7972875B2",
    "US8722458B2",
    "WO2008103931A2",
    "US7919342B2",
    "US8902152B2",
    "US7687812B2",
    "US8450927B2",
    "US8029139B2",
    "US7893612B2",
    "US8470701B2",
    "US8766970B2",
    "US20090278142A1",
    "US20110067911A1",
    "US20090315054A1",
    "US20110108800A1",
    "US7927976B2",
    "US7999454B2",
    "US20100060553A1",
    "WO2010032603A1",
    "US20100078670A1",
    "US20100123134A1",
    "US20100123268A1",
    "US8506867B2",
    "US20100148198A1",
    "US20100186883A1",
    "US20100207852A1",
    "US20100214247A1",
    "US7816856B2",
    "WO2010102310A2",
    "US8854294B2",
    "US8877648B2",
    "US20100248484A1",
    "WO2010111601A2",
    "US20100258710A1",
    "US20100264816A1",
    "WO2010132552A1",
    "US20100317132A1",
    "US8207547B2",
    "US20100315319A1",
    "US8261660B2",
    "US20110043435A1",
    "US8817369B2",
    "JP2011066130A",
    "US20120228669A1",
    "US8288843B2",
    "US20110133324A1",
    "US20120223875A1",
    "US8502192B2",
    "US8334545B2",
    "US20130273695A1",
    "US20110211348A1",
    "US20130196474A1",
    "US20130221355A1",
    "US20120080692A1",
    "US8735932B2",
    "US20120119249A1",
    "US20120141799A1",
    "US8803857B2",
    "US8686447B2",
    "US20120223636A1",
    "US20120256163A1",
    "US20150135525A1",
    "US8889485B2",
    "US20120314388A1",
    "US20120319563A1",
    "US20130015483A1",
    "US20130069275A1",
    "US20130088416A1",
    "US8605452B2",
    "US20140138543A1",
    "WO2013064800A1",
    "GB2496183A",
    "US8794501B2",
    "US20130207964A1",
    "US8884844B2",
    "US8946760B2",
    "US20140306248A1",
    "WO2013165124A1",
    "US20130309792A1",
    "US20130328190A1",
    "US8519543B1",
    "US20140231839A1",
    "US20140104243A1",
    "US20140146273A1",
    "US9202996B2",
    "US9178123B2",
    "US9153171B2",
    "US20170206845A1",
    "US9626908B2",
    "US20140175498A1",
    "US20140183446A1",
    "US20140231851A1",
    "US20140217448A1",
    "WO2014121635A1",
    "US9308649B2",
    "WO2014149864A1",
    "US20140267683A1",
    "US20140264763A1",
    "US8791474B1",
    "US20140367705A1",
    "US20150137153A1",
    "US8987765B2",
    "US20140367633A1",
    "US20150169011A1",
    "US20150263066A1",
    "US20150280089A1",
    "US20150280066A1",
    "US9105813B1",
    "US20150371974A1",
    "US20150372053A1",
    "US20150373793A1",
    "US20150371585A1",
    "US20160005721A1",
    "US20160018094A1",
    "US20150372051A1",
    "US20150372052A1",
    "US20150372393A1",
    "US9520537B2",
    "US9437782B2",
    "US9444015B2",
    "US20160064363A1",
    "US9537069B1",
    "US20170047393A1",
    "WO2016046283A2",
    "US20160093600A1",
    "US20170187976A1",
    "WO2017144573A1",
    "US20170250167A1"
  ]
}

Record 3,577 of 8,000 in Patents full text (MLC-0201). Request the full dataset.