Semiconductor device and method for fabricating the same

{
  "publication_number": "US9337057B2",
  "country": "US",
  "kind": "B2",
  "title": "Semiconductor device and method for fabricating the same",
  "abstract": "Provided are methods for fabricating semiconductor devices. The methods for fabricating the semiconductor devices may include forming a first interlayer insulation film including a trench on a substrate, forming a high-k layer along an inner sidewall and a bottom surface of the trench, forming a first work function control film including impurities along the high-k layer, removing the impurities from the first work function control film to reduce surface resistance of the first work function control film by about 30% to about 60% and forming a gate metal in the trench.",
  "claims": [
    "1. A method for fabricating a semiconductor device, the method comprising: forming a first interlayer insulation film including a trench on a substrate; forming a high-k layer along an inner sidewall and a bottom surface of the trench; forming a first work function control film along the high-k layer, the first work function control film including impurities; at least partially removing the impurities from the first work function control film to reduce surface resistance of the first work function control film by about 30% to about 60%; and forming a gate metal in the trench.",
    "2. The method of claim 1, wherein removing the impurities comprises removing the impurities by doping hydrogen into the first work function control film using hydrogen plasma.",
    "3. The method of claim 2, wherein the impurities include oxygen (O).",
    "4. The method of claim 3, wherein the first work function control film includes a material having lower electronegativity than the impurities.",
    "5. The method of claim 2, wherein a concentration of the impurities in the first work function control film is reduced by up to about 90% by doping hydrogen into the first work function control film.",
    "6. The method of claim 2, wherein the impurities include first impurities and second impurities different from the first impurities, and a concentration of the second impurities in the first work function control film is reduced by up to about 80% by doping hydrogen into the first work function control film.",
    "7. The method of claim 6, wherein the first impurities includes oxygen (O) and the second impurities includes chlorine (Cl).",
    "8. The method of claim 2, wherein doping hydrogen into the first work function control film comprises doping hydrogen at a pressure of about 5 to about 100 mTorr.",
    "9. The method of claim 2, wherein doping hydrogen into the first work function control film comprises doping hydrogen by applying a voltage of about 0.1 kV to about 2 kV to the substrate.",
    "10. The method of claim 1, further comprising forming a first barrier layer along the first work function control film, after removing the impurities.",
    "11. The method of claim 1, further comprising forming a capping layer on the trench, after forming the gate metal.",
    "12. The method of claim 11, further comprising forming a second interlayer insulation film on the capping layer after forming the capping layer, wherein the capping layer is between the first work function control film and the second interlayer insulation film such that the first work function control film does not contact the second interlayer insulation film.",
    "13. The method of claim 1, further comprising forming a second work function control film different from the first work function control film along the first work function control film, before forming the gate metal.",
    "14. A method for forming a semiconductor device, the method comprising: forming a gate insulating layer on a substrate; forming a work function control film comprising impurities on the gate insulating layer; and doping hydrogen into the work function control film using a hydrogen plasma doping process to remove at least a portion of the impurities from the work function control film.",
    "15. The method of claim 14, wherein the hydrogen plasma doping process removes up to about 90% of the impurities from the work function control film.",
    "16. The method of claim 15, wherein the impurities comprises oxygen (O).",
    "17. The method of claim 15, wherein the work function control film comprises a material having lower electronegativity than the impurities.",
    "18. The method of claim 14, wherein: the impurities comprises first impurities and second impurities that are different from the first impurities; and the hydrogen plasma doping process removes up to about 90% of the first impurities from the work function control film and removes up to about 80% of the second impurities from the work function control film.",
    "19. The method of claim 18, wherein the first impurities comprise oxygen (O) and the second impurities comprise chlorine (Cl).",
    "20. The method of claim 14, wherein the hydrogen plasma doping process is performed at a pressure of about 5 mTorr to about 100 mTorr and by applying a voltage of about 0.1 kV to about 2 kV to the substrate."
  ],
  "description_excerpt": "1. Field of the Inventive Concept\n\nThe present inventive concept relates to methods for fabricating semiconductor device.\n\n2. Description of the Related Art\n\nAs a size of a metal oxide semiconductor (MOS) transistor has been reduced, a length of a gate and a length of a channel in the MOS transistor are also gradually decreasing. Accordingly, various studies have been done to increase capacitance between the gate and the channel and to improve operating characteristics of the MOS transistor.\n\nMetal-oxide-semiconductor (MOS) transistors using a polysilicon gate electrode are widely known. Since polysilicon is capable of withstanding well at a higher temperature than most metals, it may be annealed at a high temperature with a source and drain region. In addition, since polysilicon may reduce implanting of doped atoms into a channel region, a self-aligned source and drain structure may be formed after a gate patterning process.\n\nPolysilicon has higher resistance than most metals, and a polysilicon gate electrode operates at a lower speed than a metal gate electrode. One of the methods for compensating for high resistance of polysilicon is replacing the polysilicon gate electrode with a metal gate electrode using a replacement metal gate (RMG) process. A high-temperature process is performed while polysilicon gates remain on a semiconductor substrate, and the polysilicon gates are removed after performing the high-temperature process to be replaced by metal gates, thereby forming a replacement metal gate (RMG).",
  "cpc": [
    "H10D 64/01318",
    "H01L 21/28088",
    "H01L 21/3215",
    "H01L 29/401",
    "H10D 64/017",
    "H10D 64/691",
    "H10D 84/0177",
    "H10D 84/038",
    "H10D 84/83135",
    "H10D 84/85",
    "H10P 95/00"
  ],
  "ipc": [
    "H10D 84/85",
    "H10P 32/30"
  ],
  "assignees": [
    "Samsung Electronics Co Ltd"
  ],
  "inventors": [
    "Moon-Kyu Park",
    "Oh-seong Kwon",
    "Sung-Kee Han",
    "Sang-Jin Hyun"
  ],
  "filing_date": "2015-07-17",
  "publication_date": "2016-05-10",
  "grant_date": "2016-05-10",
  "priority_date": "2014-07-21",
  "application_number": "US-201514802467-A",
  "family_id": "55075172",
  "cited_by_count": 435,
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}