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Patent · US9997357B2 · B2 · US

Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors

(11) Publication number
US9997357B2
(21) Application number
14/194,549
(22) Filing date
2014-02-28
(30) Priority date
2010-04-15
(43) Publication date
2018-06-12
(45) Date of grant
2018-06-12
(51) IPC
C23C 16/455; C23C 16/50; C23C 16/52; H10P 14/69; H10P 32/12; H10P 32/14; H10P 72/00; C23C 16/04; H01L 29/66
(52) CPC
  • H10P Generic processes or apparatus for the manufacture or treatment of devices covered by class H10: 32/12, 32/1404, 32/171, 32/19, 72/0451, 72/0468
  • C23C Coating metallic material; coating material with metallic material; surface treatment of metallic material by diffusion into the surface, by chemical conversion or substitution; coating by vacuum evaporation, by sputtering, by ion implantation or by chemical vapour deposition, in general: 16/045, 16/45529, 16/45544, 16/50, 16/52
  • H01L Semiconductor devices; electric solid state devices not otherwise provided for: 21/2225, 21/223, 21/2252, 21/67155, 21/67207, 29/66803
  • H10D Inorganic electric semiconductor devices: 30/0241
(73) Assignee
Lam Research Corp
(72) Inventors
Reza Arghavani; Samantha Tan; Bhadri N. Varadarajan; Adrien Lavoie; Ananda Banerji; Jun Qian; Shankar Swaminathan
(54) Title
Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
(57) Abstract

Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.

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Claims (22)

  1. A method of doping a channel region of a partially fabricated transistor on a semiconductor substrate, the method comprising: (a) forming a dopant-containing film on the semiconductor substrate, wherein multiple dopant-containing layers of the dopant-containing film are formed by an atomic layer deposition process comprising: (i) adsorbing a dopant-containing film precursor onto the semiconductor substrate such that the dopant-containing film precursor forms an adsorption-limited layer on the semiconductor substrate; (ii) removing at least some unadsorbed dopant-containing film precursor from volume surrounding the adsorbed precursor; (iii) reacting adsorbed dopant-containing film precursor, after removing the at least some unadsorbed precursor in (ii), to form a dopant-containing layer on the semiconductor substrate; (iv) removing desorbed dopant-containing film precursor and/or reaction by-product from volume surrounding the dopant-containing layer when present after reacting the adsorbed precursor; and (v) repeating (i) through (iv) to form the multiple dopant-containing layers of the dopant-containing film; (b) forming a capping film comprising a silicon nitride material, the capping film located such that the dopant-containing film formed in (a) is located in between the semiconductor substrate and the capping film; and (c) driving dopant from the dopant-containing film into the channel region, wherein (a) further comprises forming multiple substantially dopant-free layers of the dopant-containing film, at least some of the substantially dopant-free layers formed by an atomic layer deposition process comprising: (vi) adsorbing a dopant-free film precursor onto the semiconductor substrate such that the dopant-free film precursor forms an adsorption-limited layer on the semiconductor substrate; (vii) removing unadsorbed dopant-free film precursor from volume surrounding the adsorbed dopant-free film precursor; (viii) reacting the adsorbed dopant-free film precursor, after removing unadsorbed dopant-free film precursor in (vii), to form a substantially dopant-free layer on the semiconductor substrate; (ix) removing desorbed dopant-free film precursor or reaction by-product or desorbed dopant-free film precursor and reaction by-product from volume surrounding the substantially dopant-free layer when present after reacting the adsorbed dopant-free film precursor; and (x) repeating (vi) through (ix) to form the multiple substantially dopant-free layers of the dopant-containing film; and wherein in (a): a first dopant-rich portion of the dopant-containing film is formed by depositing the multiple dopant-containing layers in (i) through (v) sequentially, without intervening deposition of a substantially dopant-free layer; and a first substantially dopant-free portion of the dopant-containing film is formed by depositing the multiple substantially dopant-free layers in (vi) through (x) sequentially, without intervening deposition of a dopant-containing layer.
  2. The method of claim 1, further comprising: (d) after (c), removing (i) at least a portion of the dopant-containing film, or (ii) at least a portion of the capping film, or (iii) at least a portion of the dopant-containing film and at least a portion of the capping film from the semiconductor substrate.
  3. The method of claim 1, wherein the channel region is fin-shaped, and the dopant-containing film substantially conforms to the shape of the fin-shaped channel region.
  4. The method of claim 1, wherein the channel region is fin-shaped, and the driving in (c) comprises a thermal anneal which enhances diffusion of the dopant from the dopant-containing film to the fin-shaped channel region.
  5. The method of claim 1, wherein the dopant is boron.
  6. The method of claim 5, wherein at least some of the multiple dopant-containing layers comprise a borosilicate glass.
  7. The method of claim 6, wherein the dopant-containing film precursor is an alkyl borate.
  8. The method of claim 7, wherein the alkyl borate is trimethyl borate.
  9. The method of claim 1, wherein the dopant is phosphorous.
  10. The method of claim 1, wherein the dopant is arsenic.
  11. The method of claim 1, wherein the reacting in (a)(iii) comprises contacting the adsorbed dopant-containing film precursor with a plasma.
  12. The method of claim 1, wherein the reacting in (a)(iii) comprises reacting the adsorbed dopant-containing film precursor with another reactive chemical species which may or may not be first adsorbed onto the semiconductor substrate.
  13. The method of claim 1, wherein forming the capping film comprises a chemical vapor deposition process.
  14. The method of claim 13, wherein the chemical vapor deposition process is plasma enhanced.
  15. The method of claim 1, wherein forming the capping film comprises an atomic layer deposition process.
  16. The method of claim 1, wherein the channel region is fin-shaped having a width of less than about 12 nanometers.
  17. The method of claim 1, wherein an average thickness of the capping film is between about 10 and 100 Angstroms.
  18. The method of claim 1, wherein a relative standard deviation in thickness of the capping film is less than about 10%.
  19. The method of claim 1, wherein an average concentration of the silicon nitride in the capping film is between about 2 and 3 g/cm 3.
  20. The method of claim 1, wherein at least some of the multiple substantially dopant-free layers comprise a dielectric material and the capping film comprises a dielectric material different than said dielectric material of the at least some of the multiple substantially dopant-free layers.
  21. The method of claim 20, wherein said dielectric material of the at least some of the multiple substantially dopant-free layers is a silicon dioxide.
  22. The method of claim 1, wherein in (a): a second dopant-rich portion of the dopant-containing film is formed by depositing the multiple dopant-containing layers in (i) through (v) sequentially, without intervening deposition of a substantially dopant-free layer; and a second substantially dopant-free portion of the dopant-containing film is formed by depositing the multiple substantially dopant-free layers in (vi) through (x) sequentially, without intervening deposition of a dopant-containing layer; and wherein the first dopant-rich portion, the first substantially dopant-free portion, the second dopant-rich portion, and the second substantially dopant-free portion of the dopant-containing film are deposited in the following sequence: first dopant-rich portion, then first substantially dopant-free portion, then second dopant-rich portion, then second substantially dopant-free portion.

Description

FIG. 1A displays a side view schematic of a traditional planar IC transistor.

FIG. 1B displays a cross-sectional view schematic of a traditional planar IC transistor.

FIG. 1C displays a perspective view schematic of a modern tri-gate IC transistor employing a fin-shaped channel region.

FIG. 1D displays another perspective view schematic of a modern tri-gate IC transistor employing a fin-shaped channel region.

FIG. 2A schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of deposited gate electrode material.

FIG. 2B also schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of a pattern mask layer.

FIG. 2C again schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of deposited gate electrode material and also by the presence of a pattern mask layer.

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Record as JSON
{
  "publication_number": "US9997357B2",
  "country": "US",
  "kind": "B2",
  "title": "Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors",
  "abstract": "Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.",
  "claims": [
    "1. A method of doping a channel region of a partially fabricated transistor on a semiconductor substrate, the method comprising: (a) forming a dopant-containing film on the semiconductor substrate, wherein multiple dopant-containing layers of the dopant-containing film are formed by an atomic layer deposition process comprising: (i) adsorbing a dopant-containing film precursor onto the semiconductor substrate such that the dopant-containing film precursor forms an adsorption-limited layer on the semiconductor substrate; (ii) removing at least some unadsorbed dopant-containing film precursor from volume surrounding the adsorbed precursor; (iii) reacting adsorbed dopant-containing film precursor, after removing the at least some unadsorbed precursor in (ii), to form a dopant-containing layer on the semiconductor substrate; (iv) removing desorbed dopant-containing film precursor and/or reaction by-product from volume surrounding the dopant-containing layer when present after reacting the adsorbed precursor; and (v) repeating (i) through (iv) to form the multiple dopant-containing layers of the dopant-containing film; (b) forming a capping film comprising a silicon nitride material, the capping film located such that the dopant-containing film formed in (a) is located in between the semiconductor substrate and the capping film; and (c) driving dopant from the dopant-containing film into the channel region, wherein (a) further comprises forming multiple substantially dopant-free layers of the dopant-containing film, at least some of the substantially dopant-free layers formed by an atomic layer deposition process comprising: (vi) adsorbing a dopant-free film precursor onto the semiconductor substrate such that the dopant-free film precursor forms an adsorption-limited layer on the semiconductor substrate; (vii) removing unadsorbed dopant-free film precursor from volume surrounding the adsorbed dopant-free film precursor; (viii) reacting the adsorbed dopant-free film precursor, after removing unadsorbed dopant-free film precursor in (vii), to form a substantially dopant-free layer on the semiconductor substrate; (ix) removing desorbed dopant-free film precursor or reaction by-product or desorbed dopant-free film precursor and reaction by-product from volume surrounding the substantially dopant-free layer when present after reacting the adsorbed dopant-free film precursor; and (x) repeating (vi) through (ix) to form the multiple substantially dopant-free layers of the dopant-containing film; and wherein in (a): a first dopant-rich portion of the dopant-containing film is formed by depositing the multiple dopant-containing layers in (i) through (v) sequentially, without intervening deposition of a substantially dopant-free layer; and a first substantially dopant-free portion of the dopant-containing film is formed by depositing the multiple substantially dopant-free layers in (vi) through (x) sequentially, without intervening deposition of a dopant-containing layer.",
    "2. The method of claim 1, further comprising: (d) after (c), removing (i) at least a portion of the dopant-containing film, or (ii) at least a portion of the capping film, or (iii) at least a portion of the dopant-containing film and at least a portion of the capping film from the semiconductor substrate.",
    "3. The method of claim 1, wherein the channel region is fin-shaped, and the dopant-containing film substantially conforms to the shape of the fin-shaped channel region.",
    "4. The method of claim 1, wherein the channel region is fin-shaped, and the driving in (c) comprises a thermal anneal which enhances diffusion of the dopant from the dopant-containing film to the fin-shaped channel region.",
    "5. The method of claim 1, wherein the dopant is boron.",
    "6. The method of claim 5, wherein at least some of the multiple dopant-containing layers comprise a borosilicate glass.",
    "7. The method of claim 6, wherein the dopant-containing film precursor is an alkyl borate.",
    "8. The method of claim 7, wherein the alkyl borate is trimethyl borate.",
    "9. The method of claim 1, wherein the dopant is phosphorous.",
    "10. The method of claim 1, wherein the dopant is arsenic.",
    "11. The method of claim 1, wherein the reacting in (a)(iii) comprises contacting the adsorbed dopant-containing film precursor with a plasma.",
    "12. The method of claim 1, wherein the reacting in (a)(iii) comprises reacting the adsorbed dopant-containing film precursor with another reactive chemical species which may or may not be first adsorbed onto the semiconductor substrate.",
    "13. The method of claim 1, wherein forming the capping film comprises a chemical vapor deposition process.",
    "14. The method of claim 13, wherein the chemical vapor deposition process is plasma enhanced.",
    "15. The method of claim 1, wherein forming the capping film comprises an atomic layer deposition process.",
    "16. The method of claim 1, wherein the channel region is fin-shaped having a width of less than about 12 nanometers.",
    "17. The method of claim 1, wherein an average thickness of the capping film is between about 10 and 100 Angstroms.",
    "18. The method of claim 1, wherein a relative standard deviation in thickness of the capping film is less than about 10%.",
    "19. The method of claim 1, wherein an average concentration of the silicon nitride in the capping film is between about 2 and 3 g/cm 3.",
    "20. The method of claim 1, wherein at least some of the multiple substantially dopant-free layers comprise a dielectric material and the capping film comprises a dielectric material different than said dielectric material of the at least some of the multiple substantially dopant-free layers.",
    "21. The method of claim 20, wherein said dielectric material of the at least some of the multiple substantially dopant-free layers is a silicon dioxide.",
    "22. The method of claim 1, wherein in (a): a second dopant-rich portion of the dopant-containing film is formed by depositing the multiple dopant-containing layers in (i) through (v) sequentially, without intervening deposition of a substantially dopant-free layer; and a second substantially dopant-free portion of the dopant-containing film is formed by depositing the multiple substantially dopant-free layers in (vi) through (x) sequentially, without intervening deposition of a dopant-containing layer; and wherein the first dopant-rich portion, the first substantially dopant-free portion, the second dopant-rich portion, and the second substantially dopant-free portion of the dopant-containing film are deposited in the following sequence: first dopant-rich portion, then first substantially dopant-free portion, then second dopant-rich portion, then second substantially dopant-free portion."
  ],
  "description_excerpt": "FIG. 1A displays a side view schematic of a traditional planar IC transistor.\n\nFIG. 1B displays a cross-sectional view schematic of a traditional planar IC transistor.\n\nFIG. 1C displays a perspective view schematic of a modern tri-gate IC transistor employing a fin-shaped channel region.\n\nFIG. 1D displays another perspective view schematic of a modern tri-gate IC transistor employing a fin-shaped channel region.\n\nFIG. 2A schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of deposited gate electrode material.\n\nFIG. 2B also schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of a pattern mask layer.\n\nFIG. 2C again schematically illustrates the shadowing effect which may occur when attempting to dope the channel region of high aspect ratio fin-shaped structures via conventional ion-implantation techniques. This figure illustrates the scenario where the shadowing effect of an adjacent fin structure is increased due to the presence of deposited gate electrode material and also by the presence of a pattern mask layer.",
  "cpc": [
    "H10P 32/12",
    "C23C 16/045",
    "C23C 16/45529",
    "C23C 16/45544",
    "C23C 16/50",
    "C23C 16/52",
    "H01L 21/2225",
    "H01L 21/223",
    "H01L 21/2252",
    "H01L 21/67155",
    "H01L 21/67207",
    "H01L 29/66803",
    "H10D 30/0241",
    "H10P 32/1404",
    "H10P 32/171",
    "H10P 32/19",
    "H10P 72/0451",
    "H10P 72/0468"
  ],
  "ipc": [
    "C23C 16/455",
    "C23C 16/50",
    "C23C 16/52",
    "H10P 14/69",
    "H10P 32/12",
    "H10P 32/14",
    "H10P 72/00",
    "C23C 16/04",
    "H01L 29/66"
  ],
  "assignees": [
    "Lam Research Corp"
  ],
  "inventors": [
    "Reza Arghavani",
    "Samantha Tan",
    "Bhadri N. Varadarajan",
    "Adrien Lavoie",
    "Ananda Banerji",
    "Jun Qian",
    "Shankar Swaminathan"
  ],
  "filing_date": "2014-02-28",
  "publication_date": "2018-06-12",
  "grant_date": "2018-06-12",
  "priority_date": "2010-04-15",
  "application_number": "US-201414194549-A",
  "family_id": "53949826",
  "cited_by_count": 434,
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}

Record 3,441 of 8,000 in Patents full text (MLC-0201). Request the full dataset.