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Back-side bus

Term · Computing and IT · MLC-T-CMP-001431

A dedicated high-speed data path between a processor and its secondary cache, separate from the front-side bus to main memory, so cache traffic and memory traffic do not compete. In the Pentium Pro it ran at the full processor clock, while in the Pentium II it ran at half the clock. Later processors place the L2 cache on the CPU die itself, which removes the need for a separate bus.

Table 1. Record
IdentifierMLC-T-CMP-001431
FieldComputing and IT
SubjectHardware
Record as JSON 
{
  "id": "MLC-T-CMP-001431",
  "term": "Back-side bus",
  "field": "Computing and IT",
  "definition": "A dedicated high-speed data path between a processor and its secondary cache, separate from the front-side bus to main memory, so cache traffic and memory traffic do not compete. In the Pentium Pro it ran at the full processor clock, while in the Pentium II it ran at half the clock. Later processors place the L2 cache on the CPU die itself, which removes the need for a separate bus.",
  "subject": "Hardware",
  "url": "https://mlchart.com/terminology/computing/back-side-bus/"
}

Record 94 of 1,553 in Computing and IT terminology (MLC-0101). Request the full dataset.