Line edge roughness

{
  "id": "MLC-T-SEM-000199",
  "term": "Line edge roughness",
  "field": "Semiconductors",
  "definition": "The statistical variation of a patterned feature's edge from its intended straight or smooth line. This deviation, measured as a standard deviation from the ideal edge, introduces unwanted dimensional fluctuations in transistor gates and interconnects, affecting device performance and yield. Line edge roughness (LER) is quantified in nanometers, with values below 1 nm being the target for advanced logic nodes.",
  "abbreviation": "LER",
  "subject": "Lithography & Patterning",
  "url": "https://mlchart.com/terminology/semiconductors/line-edge-roughness/"
}