Mark forming method and device manufacturing method

{
  "publication_number": "US10338472B2",
  "country": "US",
  "kind": "B2",
  "title": "Mark forming method and device manufacturing method",
  "abstract": "A mark forming method includes: a step of forming, on a device layer of a wafer, an intermediate layer to which a polymer layer containing a block copolymer is adherable, the device layer including a shot area and a scribe line area; a step of removing a portion, of the intermediate layer, formed in the scribe line area; a step of exposing an image of a mark on the scribe line area and forming, based on the image of the mark, a mark including recessed portion; and a step of applying the polymer layer containing the block copolymer on the device layer of the wafer. When a circuit pattern is formed by using the self-assembly of the block copolymer, it is possible to form the mark simultaneously with the formation of the circuit pattern.",
  "claims": [
    "1. A mark forming method comprising: forming, on a substrate, a plurality of first patterns and a plurality of second patterns; applying a block copolymer on the substrate after the plurality of first patterns and the plurality of second patterns have been formed; applying a self-assembly treatment to the block copolymer applied on the substrate; forming a first mark having a first shape between adjacent patterns of the plurality of first patterns after the self-assembly treatment has been applied to the block copolymer; and forming a second mark having a second shape different from the first shape between adjacent patterns of the plurality of second patterns after the self-assembly treatment has been applied to the block copolymer.",
    "2. The mark forming method according to claim 1, wherein the block-copolymer is applied between two patterns of the plurality of first patterns and two patterns of the plurality of second patterns.",
    "3. The mark forming method according to claim 1, wherein a first recess is formed between two patterns of the plurality of first patterns and a second recess is formed between two patterns of the plurality of second patterns, and the block-copolymer is applied to the first and second recesses.",
    "4. The mark forming method according to claim 1, wherein the plurality of first patterns and the plurality of second patterns are planer pre-patterns.",
    "5. The mark forming method according to claim 1, wherein the first and second marks are formed by using a part of the block-copolymer remained without being removed.",
    "6. The mark forming method according to claim 1, wherein the first and second marks are formed in a scribe line of the substrate.",
    "7. The mark forming method according to claim 1, wherein a periodic direction of the plurality of first patterns and a periodic direction of the plurality of second patterns are different from each other.",
    "8. The mark forming method according to claim 7, wherein the periodic direction of the plurality of first patterns and the periodic direction of the plurality of second patterns are orthogonal to each other.",
    "9. A mark forming method comprising: forming, on a substrate, a plurality of first patterns and a plurality of second patterns; applying a block copolymer on the substrate after the plurality of first patterns and the plurality of second patterns have been formed; applying an annealing to the block copolymer applied on the substrate; forming a first mark having a first shape between adjacent patterns of the plurality of first patterns after the annealing has been applied to the block copolymer; and forming a second mark having a second shape different from the first shape between adjacent patterns of the plurality of second patterns after the annealing has been applied to the block copolymer.",
    "10. A device manufacturing method comprising: forming an alignment mark on a substrate by using the mark forming method as defined in claim 1; and performing an alignment by using the alignment mark, and then, exposing the substrate.",
    "11. The mark forming method according to claim 9, wherein the block-copolymer is applied between two patterns of the plurality of first patterns and two patterns of the plurality of second patterns.",
    "12. The mark forming method according to claim 9, wherein a first recess is formed between two patterns of the plurality of first patterns and a second recess is formed between two patterns of the plurality of second patterns, and the block-copolymer is applied to the first and second recesses.",
    "13. The mark forming method according to claim 9, wherein the plurality of first patterns and the plurality of second patterns are planer pre-patterns.",
    "14. The mark forming method according to claim 9, wherein the first and second marks are formed in a scribe line of the substrate.",
    "15. The mark forming method according to claim 9, wherein a periodic direction of the plurality of first patterns and a periodic direction of the plurality of second patterns are different from each other.",
    "16. The mark forming method according to claim 15, wherein the periodic direction of the plurality of first patterns and the periodic direction of the plurality of second patterns are orthogonal to each other.",
    "17. A device manufacturing method comprising: forming an alignment mark on a substrate by using the mark forming method as defined in claim 9; and performing an alignment by using the alignment mark, and then, exposing the substrate."
  ],
  "description_excerpt": "The present invention relates to a mark forming method for forming a mark in a mark formation area of a substrate and a method for producing device using the mark forming method.\n\nA semiconductor device typically includes a plurality of layers of circuit patterns formed on a substrate, and an alignment mark for positioning or alignment is formed in a mark formation area of a predetermined layer of the substrate so as to accurately align the circuit patterns of the plurality of layers relative to each other, in a production step of the semiconductor device. In a case that the substrate is a semiconductor wafer (hereinafter referred to simply as “wafer”), the alignment mark is referred to also as a “wafer mark”.\n\nConventionally, the minutest circuit pattern of the semiconductor device is formed, for example, with a dry or liquid immersion lithography step using a dry or liquid immersion exposure apparatus of which exposure wavelength is 193 nm. It is expected that formation of a circuit pattern more minute, for example, than a 22 nm node is difficult even by combining the conventional photolithography and the double-patterning process which has been recently developed.\n\nIn view of this situation, it has been suggested using the directed self-assembly (directed self-organization) of a block copolymer between patterns formed by using the lithography step so as to generate a minute structure of nano-scale (sub-lithography structure), thereby forming a circuit pattern more minute than the resolution limit of the current lithography technique (see, for example, the specification of U.S. Patent Application Publication No.",
  "cpc": [
    "H10P 50/695",
    "B82Y 40/00",
    "G03F 7/0002",
    "G03F 7/168",
    "G03F 7/20",
    "G03F 7/70341",
    "G03F 9/708",
    "H01L 21/02118",
    "H01L 21/0274",
    "H01L 21/3086",
    "H01L 2223/54426",
    "H01L 2223/5446",
    "H01L 23/544",
    "H01L 2924/00",
    "H01L 2924/0002",
    "H10P 14/683",
    "H10P 76/2041",
    "H10W 46/00",
    "H10W 46/301",
    "H10W 46/503"
  ],
  "ipc": [
    "G03F 7/20",
    "H01L 23/544",
    "H10W 10/00",
    "G03F 7/00",
    "G03F 7/16",
    "G03F 9/00"
  ],
  "assignees": [
    "Nikon Corp"
  ],
  "inventors": [
    "Tomoharu Fujiwara"
  ],
  "filing_date": "2017-12-12",
  "publication_date": "2019-07-02",
  "grant_date": "2019-07-02",
  "priority_date": "2012-07-10",
  "application_number": "US-201715839203-A",
  "family_id": "49916044",
  "cited_by_count": 1,
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}